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system76-coreboot/src
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Arthur Heymans fc6cc717ce security/intel/txt: Add weak function to skip TXT lockdown 
RAS error injection requires TXT and other related lockdown steps to
be skipped.

Change-Id: If9193a03be7e1345740ddc705f20dd4d05f3af26
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-05-20 16:21:59 +00:00
..
acpi
src/acpi: Add initial support for HMAT
2021-05-14 08:56:59 +00:00
arch
option: Introduce CMOS_LAYOUT_FILE Kconfig symbol
2021-05-18 11:43:49 +00:00
commonlib
commonlib/region: Turn addrspace_32bit into a more official API
2021-04-21 02:06:26 +00:00
console
src: Retype option API to use unsigned integers
2021-05-06 14:48:15 +00:00
cpu
cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y
2021-05-18 16:54:21 +00:00
device
device/device.c: Print bus numbers in decimal
2021-05-11 12:52:30 +00:00
drivers
drivers/acpi: Add a chip driver to generate thermal zone
2021-05-20 08:01:11 +00:00
ec
ec/google/chromeec: Implement support for DRIVERS_ACPI_THERMAL_ZONE
2021-05-20 08:01:19 +00:00
include
soc/intel/alderlake: Update CPU and IGD Device IDs
2021-05-14 09:03:01 +00:00
lib
cbfs: Increase mcache size defaults
2021-05-14 00:35:46 +00:00
mainboard
mb/google/mancomb: Enable GFX HDA device
2021-05-20 08:01:45 +00:00
northbridge
nb/intel/gm45: Guard even more macro parameters
2021-05-16 21:53:36 +00:00
security
security/intel/txt: Add weak function to skip TXT lockdown
2021-05-20 16:21:59 +00:00
soc
soc/intel/broadwell: Use Lynx Point IOBP code
2021-05-20 16:04:15 +00:00
southbridge
sb/intel/lynxpoint: Add pch_iobp_exec() function
2021-05-20 16:04:05 +00:00
superio
src: Retype option API to use unsigned integers
2021-05-06 14:48:15 +00:00
vendorcode
vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00
2021-05-16 22:17:26 +00:00
Kconfig
option: Introduce CMOS_LAYOUT_FILE Kconfig symbol
2021-05-18 11:43:49 +00:00