fce799c1b2
BUG=chrome-os-partner:49249 TEST=Compiles and boots BRANCH=none Original-Commit-Id: 96a125f99af3eaa8931563fa74ccef8dd997f3ca Original-Change-Id: Iebfe7429c400e7119510a51c3124d432f00af76d Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333319 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> squashed: soc/qualcomm/ipq40xx: Add function to reset TPM BUG=chrome-os-partner:49249 TEST=Able to read TPM registers BRANCH=none Original-Commit-Id: 9df3e9dfe61382143394a58a3a927c05a875b377 Original-Change-Id: I38732acc4418c94b88a430ba697db4e3b145c341 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/333317 Original-Commit-Ready: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Change-Id: Ifc8df3b7e231eef944efec3a6f973b402c11bcaf Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14674 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
121 lines
2.9 KiB
C
121 lines
2.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <boardid.h>
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#include <boot/coreboot_tables.h>
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#include <delay.h>
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#include <device/device.h>
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#include <gpio.h>
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#include <soc/clock.h>
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#include <soc/soc_services.h>
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#include <soc/usb.h>
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#include <symbols.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "mmu.h"
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#define USB_ENABLE_GPIO 51
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static void setup_usb(void)
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{
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usb_clock_config();
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setup_usb_host1();
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}
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#define TPM_RESET_GPIO 19
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static void ipq_setup_tpm(void)
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{
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#ifdef CONFIG_I2C_TPM
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gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO,
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GPIO_PULL_UP, GPIO_6MA, 1);
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gpio_set(TPM_RESET_GPIO, 0);
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udelay(100);
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gpio_set(TPM_RESET_GPIO, 1);
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/*
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* ----- Per the SLB 9615XQ1.2 spec -----
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*
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* 4.7.1 Reset Timing
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*
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* The TPM_ACCESS_x.tpmEstablishment bit has the correct value
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* and the TPM_ACCESS_x.tpmRegValidSts bit is typically set
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* within 8ms after RESET# is deasserted.
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*
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* The TPM is ready to receive a command after less than 30 ms.
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*
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* --------------------------------------
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*
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* I'm assuming this means "wait for 30ms"
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*
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* If we don't wait here, subsequent QUP I2C accesses
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* to the TPM either fail or timeout.
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*/
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mdelay(30);
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#endif /* CONFIG_I2C_TPM */
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}
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static void mainboard_init(device_t dev)
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{
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/* disable mmu and d-cache before setting up secure world.*/
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dcache_mmu_disable();
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start_tzbsp();
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/* Setup mmu and d-cache again as non secure entries. */
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setup_mmu(DRAM_INITIALIZED);
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setup_usb();
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ipq_setup_tpm();
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#if IS_ENABLED(CONFIG_CHROMEOS)
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/* Copy WIFI calibration data into CBMEM. */
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cbmem_add_vpd_calibration_data();
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#endif
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/*
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* Make sure bootloader can issue sounds The frequency is calculated
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* as "<frame_rate> * <bit_width> * <channels> * 4", i.e.
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*
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* 48000 * 2 * 16 * 4 = 6144000
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*/
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//audio_clock_config(6144000);
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = "gale",
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.enable_dev = mainboard_enable,
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};
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void lb_board(struct lb_header *header)
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{
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struct lb_range *dma;
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dma = (struct lb_range *)lb_new_record(header);
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dma->tag = LB_TAB_DMA;
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dma->size = sizeof(*dma);
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dma->range_start = (uintptr_t)_dma_coherent;
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dma->range_size = _dma_coherent_size;
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#if IS_ENABLED(CONFIG_CHROMEOS)
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/* Retrieve the switch interface MAC addressses. */
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lb_table_add_macs_from_vpd(header);
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#endif
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}
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