fd33781fbf
CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5570 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
76 lines
1.7 KiB
Plaintext
76 lines
1.7 KiB
Plaintext
config CPU_ALLWINNER_A10
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bool
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default n
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if CPU_ALLWINNER_A10
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config CPU_SPECIFIC_OPTIONS
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def_bool y
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select ARCH_ARMV7
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select HAVE_MONOTONIC_TIMER
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select HAVE_UART_SPECIAL
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select BOOTBLOCK_CONSOLE
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config BOOTBLOCK_CPU_INIT
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string
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default "cpu/allwinner/a10/bootblock.c"
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help
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CPU/SoC-specific bootblock code. This is useful if the
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bootblock must load microcode or copy data from ROM before
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searching for the bootblock.
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# The "eGON.BT0" header takes 32 bytes
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config BOOTBLOCK_BASE
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hex
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default 0x20
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config BOOTBLOCK_ROM_OFFSET
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hex
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default 0x00
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config CBFS_HEADER_ROM_OFFSET
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hex
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default 0x10
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# This is the maximum size bootblock that the BROM will load. If the bootblock
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# gets larger, this will generate a build failure, rather than a silent
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# "coreboot won't run" failure.
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# Normally, we would place romstage at 0x5fe0, but we place it a little lower to
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# satisfy the 64 byte alignment.
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config CBFS_ROM_OFFSET
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default 0x5fc0
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# 16 MiB above ramstage, so there is no overlap
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config ROMSTAGE_BASE
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hex
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default 0x41000000
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# Keep the stack in SRAM block A2.
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# SRAM blocks A1 (0-16KiB) and A2 (16KiB-32KiB) are always accessible to the
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# CPU. This gives us 32KiB of SRAM to boot with. The BROM bootloader will use up
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# to 24KiB to load our bootblock, which leaves us the area from 24KiB to 32KiB
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# to use however we see fit.
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config STACK_TOP
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hex
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default 0x00008000
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config STACK_BOTTOM
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hex
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default 0x00006000
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config STACK_SIZE
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hex
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default 0x00002000
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## TODO Change this to some better address not overlapping bootblock when
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## cbfstool supports creating header in arbitrary location.
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config CBFS_HEADER_ROM_OFFSET
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hex "offset of master CBFS header in ROM"
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default 0x40
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config SYS_SDRAM_BASE
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hex
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default 0x40000000
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endif # if CPU_ALLWINNER_A10
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