fe481eb3e5
Use a name consistent with the more recent soc/intel. Change-Id: Ie69583f28f384eb49517203e1c3867f27e6272de Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
54 lines
1.3 KiB
Makefile
54 lines
1.3 KiB
Makefile
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2010 Google Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
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ramstage-y += memmap.c
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ramstage-y += northbridge.c
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ramstage-y += pcie.c
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ramstage-y += gma.c
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ramstage-y += acpi.c
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romstage-y += memmap.c
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ramstage-y += common.c
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romstage-y += common.c
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smm-y += common.c
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ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
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romstage-y += early_dmi.c
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romstage-y += raminit.c
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romstage-y += raminit_common.c
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romstage-y += raminit_sandy.c
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romstage-y += raminit_ivy.c
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romstage-y += ../../../device/dram/ddr3.c
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else
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romstage-y += raminit_mrc.c
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cbfs-files-y += mrc.bin
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mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
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mrc.bin-position := 0xfffa0000
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mrc.bin-type := mrc
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endif
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romstage-y += romstage.c
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romstage-y += early_init.c
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romstage-y += ../../../arch/x86/walkcbfs.S
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smm-y += finalize.c
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postcar-y += memmap.c
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endif
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