fe4cbf1167
In order to have a proper runtime-modifyable page table API (e.g. to remap DRAM after it was intialized), we need to remove any external bookkeeping kept in global variables (which do not persist across stages) from the MMU code. This patch implements this in a similar way as it has recently been done for ARM32 (marking free table slots with a special sentinel value in the first PTE that cannot occur as part of a normal page table). Since this requires the page table buffer to be known at compile-time, we have to remove the option of passing it to mmu_init() at runtime (which I already kinda deprecated before). The existing Tegra chipsets that still used it are switched to instead define it in memlayout in a minimally invasive change. This might not be the best way to design this overall (I think we should probably just throw the tables into SRAM like on all other platforms), but I don't have a Tegra system to test so I'd rather keep this change low impact and leave the major redesign for later. Also inlined some single-use one-liner functions in mmu.c that I felt confused things more than they cleared up, and fixed an (apparently harmless?) issue with forgetting to mask out the XN page attribute bit when casting a table descriptor to a pointer. BRANCH=None BUG=None TEST=Compiled Ryu and Smaug. Booted Oak. Change-Id: Iad71f97f5ec4b1fc981dbc8ff1dc88d96c8ee55a Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/12075 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
61 lines
1.5 KiB
C
61 lines
1.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <bootblock_common.h>
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#include <arch/cache.h>
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#include <arch/stages.h>
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#include <arch/exception.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <program_loading.h>
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static int boot_cpu(void)
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{
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/*
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* FIXME: This is a stub for now. All non-boot CPUs should be
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* waiting for an interrupt. We could move the chunk of assembly
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* which puts them to sleep in here...
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*/
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return 1;
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}
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void main(void)
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{
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/* Globally disable MMU, caches, and branch prediction (these should
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* be disabled by default on reset) */
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mmu_disable();
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/*
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* Re-enable icache and branch prediction. MMU and dcache will be
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* set up later.
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*
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* Note: If booting from USB, we need to disable branch prediction
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* before copying from USB into RAM (FIXME: why?)
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*/
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if (boot_cpu()) {
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//bootblock_cpu_init();
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//bootblock_mainboard_init();
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}
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#if IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)
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console_init();
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exception_init();
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#endif
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run_romstage();
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}
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