system76-coreboot

Files

Tinghan Shen fefd000431 soc/mediatek/mt8195: Configure SCP core 2 domain setting

SCP core 2 is enabled for MT8195 camera feature. It requires the same
register access permission as SCP core 1. Therefore, we configure the
same domain ID for both cores.

BRANCH=cherry
BUG=b:193814857
TEST=cherry boot ok

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Change-Id: Idf335593936b12c083c926a252fa99c3b76cda6a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64575
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2022-05-25 12:52:29 +00:00

acpi

ec/google/chromeec: Add retimer handle to Type C conn

2022-05-04 13:15:30 +00:00

arch

arch/x86/acpi_bert_storage.c: Use a common implementation

2022-05-25 12:51:32 +00:00

commonlib

coreboot_tables: Add PCIe info to coreboot table

2022-05-19 16:34:55 +00:00

console

console: Make CONSOLE_SPI_FLASH depend on BOOT_DEVICE_SPI_FLASH