ff93c93fef
Set the default value for MAX_CPUS in the SoC config and drop it from the mainboards where it is set to those values. Change-Id: Ib56fdcfe770ef736a2c5e183481d9f9966570e6d Signed-off-by: Felix Singer <felixsinger@posteo.net> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
79 lines
1.5 KiB
Plaintext
79 lines
1.5 KiB
Plaintext
config BOARD_CLEVO_CMLU_COMMON
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def_bool n
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_I2C_HID
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_LIBGFXINIT
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select NO_UART_ON_SUPERIO
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select SOC_INTEL_COMETLAKE_1
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SPD_READ_BY_WORD
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select SYSTEM_TYPE_LAPTOP
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config BOARD_CLEVO_L140CU_BASE
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bool
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select BOARD_CLEVO_CMLU_COMMON
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select EC_SYSTEM76_EC
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select HAVE_SPD_IN_CBFS
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if BOARD_CLEVO_CMLU_COMMON
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config MAINBOARD_DIR
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default "clevo/cml-u"
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config MAINBOARD_PART_NUMBER
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default "L140CU" if BOARD_CLEVO_L140CU
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config MAINBOARD_VERSION
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string
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default "2.1A" if BOARD_CLEVO_L140CU_BASE
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config DEVICETREE
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default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config CBFS_SIZE
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default 0xc00000 if BOARD_CLEVO_L140CU_BASE
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config CONSOLE_POST
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bool
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default y
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config UART_FOR_CONSOLE
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int
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default 2
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config DIMM_MAX
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default 2 if BOARD_CLEVO_L140CU_BASE
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config VGA_BIOS_ID
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string
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default "8086,9b41"
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config TPM_PIRQ
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hex
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default 0x10 if BOARD_CLEVO_L140CU_BASE # GPP_A7/PIRQA#
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config POST_DEVICE
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bool
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default n
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config VARIANT_DIR
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default "l140cu" if BOARD_CLEVO_L140CU_BASE
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config SEABIOS_PS2_TIMEOUT
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int
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depends on PAYLOAD_SEABIOS
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default 500
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config EC_SYSTEM76_EC_BAT_THRESHOLDS
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default n if BOARD_CLEVO_L140CU_BASE
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endif
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