Files
system76-coreboot/src/drivers/ipmi/chip.h
Patrick Rudolph ffbc3b5f5f drivers/ipmi: Add chip ops
* Add chips ops for IPMI KCS.
* Get IPMI version over KCS.
* Generates ACPI SPMI table for IPMI KCS.
* Generates SMBIOS type 38 for IPMI KCS.
* Generates ACPI SPMI device for IPMI KCS on LPC device.
* Add documentation

To use this driver on BMC that support KCS on I/O:

1. Add an entry to the devicetree.cb:

 chip drivers/ipmi
    device pnp ca2.0 on end         # IPMI KCS
 end

2. Select IPMI_KCS in Kconfig.
3. (Optional) enable LPC I/O decode for the given address.

Tested on Wedge100s.

Change-Id: I73cbd2058ccdc5395baf244f31345a85eb0047d7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33255
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-06-21 12:53:44 +00:00

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _IMPI_CHIP_H_
#define _IPMI_CHIP_H_
struct drivers_ipmi_config {
u8 bmc_i2c_address;
u8 have_nv_storage;
u8 nv_storage_device_address;
u8 have_gpe;
u8 gpe_interrupt;
u8 have_apic;
u32 apic_interrupt;
};
#endif /* _IMPI_CHIP_H_ */