ffe460d77a
Convert the serial init to the generic romstage component and corresponding boards using this sio. Change-Id: I36bcf38c4351130be1ed924ecfe606336d0433f3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5588 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <stdint.h>
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#include "w83627dhg.h"
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void pnp_enter_ext_func_mode(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0x87, port);
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outb(0x87, port);
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}
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void pnp_exit_ext_func_mode(device_t dev)
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{
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u16 port = dev >> 8;
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outb(0xaa, port);
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}
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/**
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* Select Pin 89, Pin 90 function as I2C interface SDA, SCL.
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* {Pin 89, Pin 90} function can be selected as {GP33, GP32}, or
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* {RSTOUT3#, RSTOUT2#} or {SDA, SCL}
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*/
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void w83627dhg_enable_i2c(device_t dev)
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{
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u8 val;
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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val = pnp_read_config(dev, 0x2A);
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val |= 1 << 1;
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pnp_write_config(dev, 0x2A, val);
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pnp_exit_ext_func_mode(dev);
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}
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void w83627dhg_set_clksel_48(device_t dev)
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{
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u8 reg8;
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pnp_enter_ext_func_mode(dev);
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reg8 = pnp_read_config(dev, 0x24);
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reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
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pnp_write_config(dev, 0x24, reg8);
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pnp_exit_ext_func_mode(dev);
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}
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