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ShellPkg/mm: Support UINT16 segment number

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It's to follow the Shell 2.2 spec.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
This commit is contained in:
Ruiyu Ni
2017-03-21 13:47:08 +08:00
parent d590cce5cd
commit 0027921b1b
2 changed files with 20 additions and 20 deletions
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18
ShellPkg/Library/UefiShellDebug1CommandsLib/Mm.c
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@ -2,7 +2,7 @@
Main file for Mm shell Debug1 function.
(C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>
Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2005 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -58,10 +58,10 @@ CONST EFI_CPU_IO_PROTOCOL_WIDTH mShellMmCpuIoWidth[] = {
/**
Extract the PCI segment, bus, device, function, register from
from a SHELL_MM_PCI or SHELL_MM_PCIE format of address..
from a PCI or PCIE format of address..
@param[in] PciFormat Whether the address is of PCI format of PCIE format.
@param[in] Address SHELL_MM_PCI or SHELL_MM_PCIE address.
@param[in] Address PCI or PCIE address.
@param[out] Segment PCI segment number.
@param[out] Bus PCI bus number.
@param[out] Device PCI device number.
@ -81,10 +81,10 @@ ShellMmDecodePciAddress (
{
if (PciFormat) {
//
// PCI Configuration Space.The address will have the format 0x000000ssbbddffrr,
// where ss = Segment, bb = Bus, dd = Device, ff = Function and rr = Register.
// PCI Configuration Space.The address will have the format ssssbbddffrr,
// where ssss = Segment, bb = Bus, dd = Device, ff = Function and rr = Register.
//
*Segment = (UINT32) (RShiftU64 (Address, 32) & 0xFF);
*Segment = (UINT32) (RShiftU64 (Address, 32) & 0xFFFF);
*Bus = (UINT8) (((UINT32) Address) >> 24);
if (Device != NULL) {
@ -98,10 +98,10 @@ ShellMmDecodePciAddress (
}
} else {
//
// PCI Express Configuration Space.The address will have the format 0x0000000ssbbddffrrr,
// where ss = Segment, bb = Bus, dd = Device, ff = Function and rrr = Register.
// PCI Express Configuration Space.The address will have the format ssssssbbddffrrr,
// where ssss = Segment, bb = Bus, dd = Device, ff = Function and rrr = Register.
//
*Segment = (UINT32) (RShiftU64 (Address, 36) & 0xFF);
*Segment = (UINT32) (RShiftU64 (Address, 36) & 0xFFFF);
*Bus = (UINT8) RShiftU64 (Address, 28);
if (Device != NULL) {
*Device = (UINT8) (((UINT32) Address) >> 20);