Update the text to use "x64" instead of "X64" in MdePkg.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6854 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8
2008-12-05 03:23:13 +00:00
parent 714e2a12d5
commit 030cd1a2e9
87 changed files with 230 additions and 230 deletions

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@@ -579,7 +579,7 @@ InternalLongJump (
Reads the current Global Descriptor Table Register(GDTR) descriptor.
Reads and returns the current GDTR descriptor and returns it in Gdtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
@param Gdtr Pointer to a GDTR descriptor.
@@ -594,7 +594,7 @@ InternalX86ReadGdtr (
Writes the current Global Descriptor Table Register (GDTR) descriptor.
Writes and the current GDTR descriptor specified by Gdtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Gdtr Pointer to a GDTR descriptor.
@@ -609,7 +609,7 @@ InternalX86WriteGdtr (
Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
Reads and returns the current IDTR descriptor and returns it in Idtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
@param Idtr Pointer to a IDTR descriptor.
@@ -624,7 +624,7 @@ InternalX86ReadIdtr (
Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
Writes the current IDTR descriptor and returns it in Idtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Idtr Pointer to a IDTR descriptor.
@@ -640,7 +640,7 @@ InternalX86WriteIdtr (
Saves the current floating point/SSE/SSE2 state to the buffer specified by
Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
@@ -656,7 +656,7 @@ InternalX86FxSave (
Restores the current floating point/SSE/SSE2 state from the buffer specified
by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
@@ -790,7 +790,7 @@ InternalX86EnablePaging64 (
Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
mode. This function assumes the current execution mode is 64-paging mode.
This function is only available on X64. After the 64-bit paging mode is
This function is only available on x64. After the 64-bit paging mode is
disabled, control is transferred to the function specified by EntryPoint
using the new stack specified by NewStack and passing in the parameters
specified by Context1 and Context2. Context1 and Context2 are optional and

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@@ -21,7 +21,7 @@
If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
This function is only available on IA-32 and X64.
This function is only available on IA-32 and x64.
@param Index The 32-bit value to load into EAX prior to invoking the CPUID
instruction.

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@@ -20,7 +20,7 @@
coherency domain of the CPU.
Flushed the cache line specified by LinearAddress, and returns LinearAddress.
This function is only available on IA-32 and X64.
This function is only available on IA-32 and x64.
@param LinearAddress The address of the cache line to flush. If the CPU is
in a physical addressing mode, then LinearAddress is a

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@@ -21,7 +21,7 @@
Restores the current floating point/SSE/SSE2 state from the buffer specified
by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.

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@@ -21,7 +21,7 @@
Saves the current floating point/SSE/SSE2 state to the buffer specified by
Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.

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@@ -19,7 +19,7 @@
Executes a INVD instruction.
Executes a INVD instruction. This function is only available on IA-32 and
X64.
x64.
**/
VOID

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@@ -16,7 +16,7 @@
Sets up a monitor buffer that is used by AsmMwait().
Executes a MONITOR instruction with the register state specified by Eax, Ecx
and Edx. Returns Eax. This function is only available on IA-32 and X64.
and Edx. Returns Eax. This function is only available on IA-32 and x64.
@param RegisterEax The value to load into EAX or RAX before executing the MONITOR
instruction.

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@@ -16,7 +16,7 @@
Executes an MWAIT instruction.
Executes an MWAIT instruction with the register state specified by Eax and
Ecx. Returns Eax. This function is only available on IA-32 and X64.
Ecx. Returns Eax. This function is only available on IA-32 and x64.
@param RegisterEax The value to load into EAX or RAX before executing the MONITOR
instruction.

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@@ -19,7 +19,7 @@
Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
mode. This function assumes the current execution mode is 64-paging mode.
This function is only available on X64. After the 64-bit paging mode is
This function is only available on x64. After the 64-bit paging mode is
disabled, control is transferred to the function specified by EntryPoint
using the new stack specified by NewStack and passing in the parameters
specified by Context1 and Context2. Context1 and Context2 are optional and

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@@ -19,8 +19,8 @@
Reads the current value of the Control Register 0 (CR0).
Reads and returns the current value of CR4. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of the Control Register 0 (CR0).

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@@ -19,8 +19,8 @@
Reads the current value of the Control Register 2 (CR2).
Reads and returns the current value of CR2. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of the Control Register 2 (CR2).

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@@ -19,8 +19,8 @@
Reads the current value of the Control Register 3 (CR3).
Reads and returns the current value of CR3. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of the Control Register 3 (CR3).

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@@ -19,8 +19,8 @@
Reads the current value of the Control Register 4 (CR4).
Reads and returns the current value of CR4. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of the Control Register 4 (CR4).

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@@ -19,7 +19,7 @@
Reads the current value of Code Segment Register (CS).
Reads and returns the current value of CS. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of CS.

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 0 (DR0).
Reads and returns the current value of DR0. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 0 (DR0).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 1 (DR1).
Reads and returns the current value of DR1. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 1 (DR1).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 2 (DR2).
Reads and returns the current value of DR2. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 2 (DR2).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 3 (DR3).
Reads and returns the current value of DR3. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 3 (DR3).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 4 (DR4).
Reads and returns the current value of DR4. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 4 (DR4).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 5 (DR5).
Reads and returns the current value of DR5. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 5 (DR5).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 6 (DR6).
Reads and returns the current value of DR6. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 6 (DR6).

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@@ -19,8 +19,8 @@
Reads the current value of Debug Register 7 (DR7).
Reads and returns the current value of DR7. This function is only available
on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
X64.
on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
x64.
@return The value of Debug Register 7 (DR7).

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@@ -19,7 +19,7 @@
Reads the current value of Data Segment Register (DS).
Reads and returns the current value of DS. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of DS.

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@@ -19,10 +19,10 @@
Reads the current value of the EFLAGS register.
Reads and returns the current value of the EFLAGS register. This function is
only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
64-bit value on X64.
only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
64-bit value on x64.
@return EFLAGS on IA-32 or RFLAGS on X64.
@return EFLAGS on IA-32 or RFLAGS on x64.
**/
UINTN

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@@ -19,7 +19,7 @@
Reads the current value of ES Data Segment Register (ES).
Reads and returns the current value of ES. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of ES.

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@@ -19,7 +19,7 @@
Reads the current value of FS Data Segment Register (FS).
Reads and returns the current value of FS. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of FS.

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@@ -20,7 +20,7 @@
Reads the current Global Descriptor Table Register(GDTR) descriptor.
Reads and returns the current GDTR descriptor and returns it in Gdtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
@param Gdtr Pointer to a GDTR descriptor.

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@@ -19,7 +19,7 @@
Reads the current value of GS Data Segment Register (GS).
Reads and returns the current value of GS. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of GS.

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@@ -20,7 +20,7 @@
Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
Reads and returns the current IDTR descriptor and returns it in Idtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
@param Idtr Pointer to a IDTR descriptor.

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@@ -19,7 +19,7 @@
Reads the current Local Descriptor Table Register(LDTR) selector.
Reads and returns the current 16-bit LDTR descriptor value. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@return The current selector of LDT.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #0 (MM0).
Reads and returns the current value of MM0. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM0.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #1 (MM1).
Reads and returns the current value of MM1. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM1.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #2 (MM2).
Reads and returns the current value of MM2. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM2.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #3 (MM3).
Reads and returns the current value of MM3. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM3.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #4 (MM4).
Reads and returns the current value of MM4. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM4.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #5 (MM5).
Reads and returns the current value of MM5. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM5.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #6 (MM6).
Reads and returns the current value of MM6. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM6.

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@@ -19,7 +19,7 @@
Reads the current value of 64-bit MMX Register #7 (MM7).
Reads and returns the current value of MM7. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of MM7.

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@@ -22,7 +22,7 @@
performed on Index, and some Index values may cause CPU exceptions. The
caller must either guarantee that Index is valid, or the caller must set up
exception handlers to catch the exceptions. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@param Index The 32-bit MSR index to read.

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@@ -16,7 +16,7 @@
Reads the current value of a Performance Counter (PMC).
Reads and returns the current value of performance counter specified by
Index. This function is only available on IA-32 and X64.
Index. This function is only available on IA-32 and x64.
@param Index The 32-bit Performance Counter index to read.

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@@ -19,7 +19,7 @@
Reads the current value of Stack Segment Register (SS).
Reads and returns the current value of SS. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of SS.

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@@ -19,7 +19,7 @@
Reads the current value of Task Register (TR).
Reads and returns the current value of TR. This function is only available on
IA-32 and X64.
IA-32 and x64.
@return The current value of TR.

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@@ -19,7 +19,7 @@
Reads the current value of Time Stamp Counter (TSC).
Reads and returns the current value of TSC. This function is only available
on IA-32 and X64.
on IA-32 and x64.
@return The current value of TSC

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@@ -19,7 +19,7 @@
Executes a WBINVD instruction.
Executes a WBINVD instruction. This function is only available on IA-32 and
X64.
x64.
**/
VOID

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@@ -16,7 +16,7 @@
Writes a value to Control Register 0 (CR0).
Writes and returns a new value to CR0. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to CR0.

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@@ -16,7 +16,7 @@
Writes a value to Control Register 2 (CR2).
Writes and returns a new value to CR2. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to CR2.

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@@ -16,7 +16,7 @@
Writes a value to Control Register 3 (CR3).
Writes and returns a new value to CR3. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to CR3.

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@@ -16,7 +16,7 @@
Writes a value to Control Register 4 (CR4).
Writes and returns a new value to CR4. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to CR4.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 0 (DR0).
Writes and returns a new value to DR0. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr0.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 1 (DR1).
Writes and returns a new value to DR1. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr1.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 2 (DR2).
Writes and returns a new value to DR2. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr2.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 3 (DR3).
Writes and returns a new value to DR3. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr3.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 4 (DR4).
Writes and returns a new value to DR4. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr4.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 5 (DR5).
Writes and returns a new value to DR5. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr5.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 6 (DR6).
Writes and returns a new value to DR6. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr6.

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@@ -16,7 +16,7 @@
Writes a value to Debug Register 7 (DR7).
Writes and returns a new value to DR7. This function is only available on
IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
@param Value The value to write to Dr7.

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@@ -20,7 +20,7 @@
Writes the current Global Descriptor Table Register (GDTR) descriptor.
Writes and the current GDTR descriptor specified by Gdtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Gdtr Pointer to a GDTR descriptor.

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@@ -19,7 +19,7 @@
Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
Writes the current IDTR descriptor and returns it in Idtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Idtr Pointer to a IDTR descriptor.

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@@ -19,7 +19,7 @@
Writes the current Local Descriptor Table Register (GDTR) selector.
Writes and the current LDTR descriptor specified by Ldtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
@param Ldtr 16-bit LDTR selector value.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #0 (MM0).
Writes the current value of MM0. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM0.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #1 (MM1).
Writes the current value of MM1. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM1.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #2 (MM2).
Writes the current value of MM2. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM2.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #3 (MM3).
Writes the current value of MM3. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM3.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #4 (MM4).
Writes the current value of MM4. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM4.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #5 (MM5).
Writes the current value of MM5. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM5.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #6 (MM6).
Writes the current value of MM6. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM6.

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@@ -19,7 +19,7 @@
Writes the current value of 64-bit MMX Register #7 (MM7).
Writes the current value of MM7. This function is only available on IA32 and
X64.
x64.
@param Value The 64-bit value to write to MM7.

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@@ -24,7 +24,7 @@
performed on Index or Value, and some of these may cause CPU exceptions. The
caller must either guarantee that Index and Value are valid, or the caller
must establish proper exception handlers. This function is only available on
IA-32 and X64.
IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param Value The 64-bit value to write to the MSR.

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@@ -22,7 +22,7 @@
Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
mode. This function assumes the current execution mode is 64-paging mode.
This function is only available on X64. After the 64-bit paging mode is
This function is only available on x64. After the 64-bit paging mode is
disabled, control is transferred to the function specified by EntryPoint
using the new stack specified by NewStack and passing in the parameters
specified by Context1 and Context2. Context1 and Context2 are optional and

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@@ -22,7 +22,7 @@
Restores the current floating point/SSE/SSE2 state from the buffer specified
by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 16-byte boundary, then ASSERT().

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@@ -22,7 +22,7 @@
Saves the current floating point/SSE/SSE2 state to the buffer specified by
Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
If Buffer is NULL, then ASSERT().
If Buffer is not aligned on a 16-byte boundary, then ASSERT().

View File

@@ -23,7 +23,7 @@
No parameter checking is performed on Index, and some Index values may cause
CPU exceptions. The caller must either guarantee that Index is valid, or the
caller must set up exception handlers to catch the exceptions. This function
is only available on IA-32 and X64.
is only available on IA-32 and x64.
@param Index The 32-bit MSR index to read.
@@ -47,7 +47,7 @@ AsmReadMsr32 (
the MSR is returned. No parameter checking is performed on Index or Value,
and some of these may cause CPU exceptions. The caller must either guarantee
that Index and Value are valid, or the caller must establish proper exception
handlers. This function is only available on IA-32 and X64.
handlers. This function is only available on IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param Value The 32-bit value to write to the MSR.
@@ -76,7 +76,7 @@ AsmWriteMsr32 (
performed on Index or OrData, and some of these may cause CPU exceptions. The
caller must either guarantee that Index and OrData are valid, or the caller
must establish proper exception handlers. This function is only available on
IA-32 and X64.
IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param OrData The value to OR with the read value from the MSR.
@@ -105,7 +105,7 @@ AsmMsrOr32 (
on Index or AndData, and some of these may cause CPU exceptions. The caller
must either guarantee that Index and AndData are valid, or the caller must
establish proper exception handlers. This function is only available on IA-32
and X64.
and x64.
@param Index The 32-bit MSR index to write.
@param AndData The value to AND with the read value from the MSR.
@@ -136,7 +136,7 @@ AsmMsrAnd32 (
AndData, or OrData, and some of these may cause CPU exceptions. The caller
must either guarantee that Index, AndData, and OrData are valid, or the
caller must establish proper exception handlers. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param AndData The value to AND with the read value from the MSR.
@@ -163,7 +163,7 @@ AsmMsrAndThenOr32 (
specified by the StartBit and the EndBit. The value of the bit field is
returned. The caller must either guarantee that Index is valid, or the caller
must set up exception handlers to catch the exceptions. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
@@ -198,7 +198,7 @@ AsmMsrBitFieldRead32 (
returned. Extra left bits in Value are stripped. The caller must either
guarantee that Index and the data written is valid, or the caller must set up
exception handlers to catch the exceptions. This function is only available
on IA-32 and X64.
on IA-32 and x64.
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
@@ -238,7 +238,7 @@ AsmMsrBitFieldWrite32 (
written to the MSR are returned. Extra left bits in OrData are stripped. The
caller must either guarantee that Index and the data written is valid, or
the caller must set up exception handlers to catch the exceptions. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
@@ -278,7 +278,7 @@ AsmMsrBitFieldOr32 (
MSR are returned. Extra left bits in AndData are stripped. The caller must
either guarantee that Index and the data written is valid, or the caller must
set up exception handlers to catch the exceptions. This function is only
available on IA-32 and X64.
available on IA-32 and x64.
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
@@ -320,7 +320,7 @@ AsmMsrBitFieldAnd32 (
in both AndData and OrData are stripped. The caller must either guarantee
that Index and the data written is valid, or the caller must set up exception
handlers to catch the exceptions. This function is only available on IA-32
and X64.
and x64.
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
@@ -368,7 +368,7 @@ AsmMsrBitFieldAndThenOr32 (
returned. No parameter checking is performed on Index or OrData, and some of
these may cause CPU exceptions. The caller must either guarantee that Index
and OrData are valid, or the caller must establish proper exception handlers.
This function is only available on IA-32 and X64.
This function is only available on IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param OrData The value to OR with the read value from the MSR.
@@ -396,7 +396,7 @@ AsmMsrOr64 (
parameter checking is performed on Index or OrData, and some of these may
cause CPU exceptions. The caller must either guarantee that Index and OrData
are valid, or the caller must establish proper exception handlers. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
@param Index The 32-bit MSR index to write.
@param AndData The value to AND with the read value from the MSR.
@@ -426,7 +426,7 @@ AsmMsrAnd64 (
or OrData, and some of these may cause CPU exceptions. The caller must either
guarantee that Index, AndData, and OrData are valid, or the caller must
establish proper exception handlers. This function is only available on IA-32
and X64.
and x64.
@param Index The 32-bit MSR index to write.
@param AndData The value to AND with the read value from the MSR.
@@ -453,7 +453,7 @@ AsmMsrAndThenOr64 (
StartBit and the EndBit. The value of the bit field is returned. The caller
must either guarantee that Index is valid, or the caller must set up
exception handlers to catch the exceptions. This function is only available
on IA-32 and X64.
on IA-32 and x64.
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
@@ -487,7 +487,7 @@ AsmMsrBitFieldRead64 (
preserved. The MSR written is returned. Extra left bits in Value are
stripped. The caller must either guarantee that Index and the data written is
valid, or the caller must set up exception handlers to catch the exceptions.
This function is only available on IA-32 and X64.
This function is only available on IA-32 and x64.
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
@@ -528,7 +528,7 @@ AsmMsrBitFieldWrite64 (
returned. Extra left bits in OrData are stripped. The caller must either
guarantee that Index and the data written is valid, or the caller must set up
exception handlers to catch the exceptions. This function is only available
on IA-32 and X64.
on IA-32 and x64.
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
@@ -569,7 +569,7 @@ AsmMsrBitFieldOr64 (
Extra left bits in AndData are stripped. The caller must either guarantee
that Index and the data written is valid, or the caller must set up exception
handlers to catch the exceptions. This function is only available on IA-32
and X64.
and x64.
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().
@@ -611,7 +611,7 @@ AsmMsrBitFieldAnd64 (
value written to the MSR is returned. Extra left bits in both AndData and
OrData are stripped. The caller must either guarantee that Index and the data
written is valid, or the caller must set up exception handlers to catch the
exceptions. This function is only available on IA-32 and X64.
exceptions. This function is only available on IA-32 and x64.
If StartBit is greater than 63, then ASSERT().
If EndBit is greater than 63, then ASSERT().

View File

@@ -21,7 +21,7 @@
Reads the current Global Descriptor Table Register(GDTR) descriptor.
Reads and returns the current GDTR descriptor and returns it in Gdtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
If Gdtr is NULL, then ASSERT().

View File

@@ -21,7 +21,7 @@
Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
Reads and returns the current IDTR descriptor and returns it in Idtr. This
function is only available on IA-32 and X64.
function is only available on IA-32 and x64.
If Idtr is NULL, then ASSERT().

View File

@@ -1,5 +1,5 @@
/** @file
Real Mode Thunk Functions for IA32 and X64.
Real Mode Thunk Functions for IA32 and x64.
Copyright (c) 2006, Intel Corporation<BR>
All rights reserved. This program and the accompanying materials

View File

@@ -21,7 +21,7 @@
Writes the current Global Descriptor Table Register (GDTR) descriptor.
Writes and the current GDTR descriptor specified by Gdtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
If Gdtr is NULL, then ASSERT().

View File

@@ -21,7 +21,7 @@
Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
Writes the current IDTR descriptor and returns it in Idtr. This function is
only available on IA-32 and X64.
only available on IA-32 and x64.
If Idtr is NULL, then ASSERT().