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ArmPlatformPkg/PL011Uart: Allowed to change UART settings in its initialization function

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Because this driver can be used for different purposes (Terminal, Debug port, communication),
its initialization function has been extended to accept additional settings.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13071 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-02-29 17:19:52 +00:00
parent b0855f925c
commit 051e63bb55
6 changed files with 650 additions and 368 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
ArmPlatformPkg/ArmPlatformPkg.dec
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@ -101,8 +101,9 @@
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021 gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
## PL011 UART ## PL011 UART
gArmPlatformTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0x00000000|UINT32|0x0000001F gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
gArmPlatformTokenSpaceGuid.PcdUartDefaultTimeout|0x00000000|UINT32|0x00000020 gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
## PL031 RealTimeClock ## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024 gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024

498
ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
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@ -1,137 +1,361 @@
/** @file /** @file
Serial I/O Port library functions with no library constructor/destructor Serial I/O Port library functions with no library constructor/destructor
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR> Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/ **/
#include <Include/Uefi.h> #include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/IoLib.h> #include <Library/PcdLib.h>
#include <Drivers/PL011Uart.h> #include <Drivers/PL011Uart.h>
/* /*
Programmed hardware of Serial port. Initialise the serial port to the specified settings.
All unspecified settings will be set to the default values.
@return Always return EFI_UNSUPPORTED.
@return Always return EFI_SUCCESS or EFI_INVALID_PARAMETER.
**/
RETURN_STATUS **/
EFIAPI RETURN_STATUS
PL011UartInitialize ( EFIAPI
IN UINTN UartBase, PL011UartInitializePort (
IN UINTN BaudRate, IN UINTN UartBase,
IN UINTN LineControl IN UINT64 BaudRate,
) IN UINT32 ReceiveFifoDepth,
{ IN UINT32 Timeout,
if (BaudRate == 115200) { IN EFI_PARITY_TYPE Parity,
// Initialize baud rate generator IN UINT8 DataBits,
MmioWrite32 (UartBase + UARTIBRD, UART_115200_IDIV); IN EFI_STOP_BITS_TYPE StopBits
MmioWrite32 (UartBase + UARTFBRD, UART_115200_FDIV); )
} else if (BaudRate == 38400) { {
// Initialize baud rate generator UINT32 LineControl;
MmioWrite32 (UartBase + UARTIBRD, UART_38400_IDIV); UINT32 Divisor;
MmioWrite32 (UartBase + UARTFBRD, UART_38400_FDIV);
} else if (BaudRate == 19200) { // The BaudRate must be passed
// Initialize baud rate generator if (BaudRate == 0) {
MmioWrite32 (UartBase + UARTIBRD, UART_19200_IDIV); return RETURN_INVALID_PARAMETER;
MmioWrite32 (UartBase + UARTFBRD, UART_19200_FDIV); }
} else {
return EFI_INVALID_PARAMETER; LineControl = 0;
}
// The PL011 supports a buffer of either 1 or 32 chars. Therefore we can accept
// No parity, 1 stop, no fifo, 8 data bits // 1 char buffer as the minimum fifo size. Because everything can be rounded down,
MmioWrite32 (UartBase + UARTLCR_H, LineControl); // there is no maximum fifo size.
if (ReceiveFifoDepth == 0) {
// Clear any pending errors LineControl |= PL011_UARTLCR_H_FEN;
MmioWrite32 (UartBase + UARTECR, 0); } else if (ReceiveFifoDepth < 32) {
// Nothing else to do. 1 byte fifo is default.
// Enable tx, rx, and uart overall } else if (ReceiveFifoDepth >= 32) {
MmioWrite32 (UartBase + UARTCR, PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN); LineControl |= PL011_UARTLCR_H_FEN;
}
return EFI_SUCCESS;
} //
// Parity
/** //
Write data to serial device. switch (Parity) {
case DefaultParity:
@param Buffer Point of data buffer which need to be written. case NoParity:
@param NumberOfBytes Number of output bytes which are cached in Buffer. // Nothing to do. Parity is disabled by default.
break;
@retval 0 Write data failed. case EvenParity:
@retval !0 Actual number of bytes written to serial device. LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);
break;
**/ case OddParity:
UINTN LineControl |= PL011_UARTLCR_H_PEN;
EFIAPI break;
PL011UartWrite ( case MarkParity:
IN UINTN UartBase, LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS | PL011_UARTLCR_H_EPS);
IN UINT8 *Buffer, break;
IN UINTN NumberOfBytes case SpaceParity:
) LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);
{ break;
UINTN Count; default:
return RETURN_INVALID_PARAMETER;
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { }
while ((MmioRead32 (UartBase + UARTFR) & UART_TX_EMPTY_FLAG_MASK) == 0);
MmioWrite8 (UartBase + UARTDR, *Buffer); //
} // Data Bits
//
return NumberOfBytes; switch (DataBits) {
} case 0:
case 8:
/** LineControl |= PL011_UARTLCR_H_WLEN_8;
Read data from serial device and save the data in buffer. break;
case 7:
@param Buffer Point of data buffer which need to be written. LineControl |= PL011_UARTLCR_H_WLEN_7;
@param NumberOfBytes Number of output bytes which are cached in Buffer. break;
case 6:
@retval 0 Read data failed. LineControl |= PL011_UARTLCR_H_WLEN_6;
@retval !0 Actual number of bytes read from serial device. break;
case 5:
**/ LineControl |= PL011_UARTLCR_H_WLEN_5;
UINTN break;
EFIAPI default:
PL011UartRead ( return RETURN_INVALID_PARAMETER;
IN UINTN UartBase, }
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes //
) // Stop Bits
{ //
UINTN Count; switch (StopBits) {
case DefaultStopBits:
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { case OneStopBit:
while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0); // Nothing to do. One stop bit is enabled by default.
*Buffer = MmioRead8 (UartBase + UARTDR); break;
} case TwoStopBits:
LineControl |= PL011_UARTLCR_H_STP2;
return NumberOfBytes; break;
} case OneFiveStopBits:
// Only 1 or 2 stops bits are supported
/** default:
Check to see if any data is available to be read from the debug device. return RETURN_INVALID_PARAMETER;
}
@retval EFI_SUCCESS At least one byte of data is available to be read
@retval EFI_NOT_READY No data is available to be read // Don't send the LineControl value to the PL011 yet,
@retval EFI_DEVICE_ERROR The serial device is not functioning properly // wait until after the Baud Rate setting.
// This ensures we do not mess up the UART settings halfway through
**/ // in the rare case when there is an error with the Baud Rate.
BOOLEAN
EFIAPI //
PL011UartPoll ( // Baud Rate
IN UINTN UartBase //
) if (PcdGet32(PL011UartInteger) != 0) {
{ // Integer and Factional part must be different of 0
return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0); ASSERT(PcdGet32(PL011UartFractional) != 0);
}
MmioWrite32 (UartBase + UARTIBRD, PcdGet32(PL011UartInteger));
MmioWrite32 (UartBase + UARTFBRD, PcdGet32(PL011UartFractional));
} else {
Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / BaudRate;
MmioWrite32 (UartBase + UARTIBRD, Divisor >> 6);
MmioWrite32 (UartBase + UARTFBRD, Divisor & 0x3F);
}
// No parity, 1 stop, no fifo, 8 data bits
MmioWrite32 (UartBase + UARTLCR_H, LineControl);
// Clear any pending errors
MmioWrite32 (UartBase + UARTECR, 0);
// Enable tx, rx, and uart overall
MmioWrite32 (UartBase + UARTCR, PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);
return RETURN_SUCCESS;
}
/**
Set the serial device control bits.
@param UartBase The base address of the PL011 UART.
@param Control Control bits which are to be set on the serial device.
@retval EFI_SUCCESS The new control bits were set on the serial device.
@retval EFI_UNSUPPORTED The serial device does not support this operation.
@retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
**/
RETURN_STATUS
EFIAPI
PL011UartSetControl (
IN UINTN UartBase,
IN UINT32 Control
)
{
UINT32 Bits;
UINT32 ValidControlBits;
ValidControlBits = ( EFI_SERIAL_REQUEST_TO_SEND
| EFI_SERIAL_DATA_TERMINAL_READY
// | EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE // Not implemented yet.
// | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE // Not implemented yet.
| EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
);
if (Control & (~ValidControlBits)) {
return EFI_UNSUPPORTED;
}
Bits = MmioRead32 (UartBase + UARTCR);
if (Control & EFI_SERIAL_REQUEST_TO_SEND) {
Bits |= PL011_UARTCR_RTS;
}
if (Control & EFI_SERIAL_DATA_TERMINAL_READY) {
Bits |= PL011_UARTCR_DTR;
}
if (Control & EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE) {
Bits |= PL011_UARTCR_LBE;
}
if (Control & EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE) {
Bits |= (PL011_UARTCR_CTSEN & PL011_UARTCR_RTSEN);
}
MmioWrite32 (UartBase + UARTCR, Bits);
return RETURN_SUCCESS;
}
/**
Get the serial device control bits.
@param UartBase The base address of the PL011 UART.
@param Control Control signals read from the serial device.
@retval EFI_SUCCESS The control bits were read from the serial device.
@retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
**/
RETURN_STATUS
EFIAPI
PL011UartGetControl (
IN UINTN UartBase,
OUT UINT32 *Control
)
{
UINT32 FlagRegister;
UINT32 ControlRegister;
FlagRegister = MmioRead32 (UartBase + UARTFR);
ControlRegister = MmioRead32 (UartBase + UARTCR);
*Control = 0;
if ((FlagRegister & PL011_UARTFR_CTS) == PL011_UARTFR_CTS) {
*Control |= EFI_SERIAL_CLEAR_TO_SEND;
}
if ((FlagRegister & PL011_UARTFR_DSR) == PL011_UARTFR_DSR) {
*Control |= EFI_SERIAL_DATA_SET_READY;
}
if ((FlagRegister & PL011_UARTFR_RI) == PL011_UARTFR_RI) {
*Control |= EFI_SERIAL_RING_INDICATE;
}
if ((FlagRegister & PL011_UARTFR_DCD) == PL011_UARTFR_DCD) {
*Control |= EFI_SERIAL_CARRIER_DETECT;
}
if ((ControlRegister & PL011_UARTCR_RTS) == PL011_UARTCR_RTS) {
*Control |= EFI_SERIAL_REQUEST_TO_SEND;
}
if ((ControlRegister & PL011_UARTCR_DTR) == PL011_UARTCR_DTR) {
*Control |= EFI_SERIAL_DATA_TERMINAL_READY;
}
if ((FlagRegister & PL011_UARTFR_RXFE) == PL011_UARTFR_RXFE) {
*Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY;
}
if ((FlagRegister & PL011_UARTFR_TXFE) == PL011_UARTFR_TXFE) {
*Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
}
if ((ControlRegister & (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) {
*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
#ifdef NEVER
// ToDo: Implement EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
if ((ControlRegister & PL011_UARTCR_LBE) == PL011_UARTCR_LBE) {
*Control |= EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE;
}
// ToDo: Implement EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE
if (SoftwareLoopbackEnable) {
*Control |= EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;
}
#endif
return RETURN_SUCCESS;
}
/**
Write data to serial device.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Write data failed.
@retval !0 Actual number of bytes written to serial device.
**/
UINTN
EFIAPI
PL011UartWrite (
IN UINTN UartBase,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
UINTN Count;
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
while ((MmioRead32 (UartBase + UARTFR) & UART_TX_EMPTY_FLAG_MASK) == 0);
MmioWrite8 (UartBase + UARTDR, *Buffer);
}
return NumberOfBytes;
}
/**
Read data from serial device and save the data in buffer.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Read data failed.
@retval !0 Actual number of bytes read from serial device.
**/
UINTN
EFIAPI
PL011UartRead (
IN UINTN UartBase,
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
UINTN Count;
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
*Buffer = MmioRead8 (UartBase + UARTDR);
}
return NumberOfBytes;
}
/**
Check to see if any data is available to be read from the debug device.
@retval EFI_SUCCESS At least one byte of data is available to be read
@retval EFI_NOT_READY No data is available to be read
@retval EFI_DEVICE_ERROR The serial device is not functioning properly
**/
BOOLEAN
EFIAPI
PL011UartPoll (
IN UINTN UartBase
)
{
return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0);
}

75
ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
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@ -1,36 +1,39 @@
#/** @file #/** @file
# #
# Component description file for PL011Uart module # Component description file for PL011Uart module
# #
# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> # Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
# #
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php # http://opensource.org/licenses/bsd-license.php
# #
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
# #
#**/ #**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = PL011Uart BASE_NAME = PL011Uart
FILE_GUID = 4ec8b120-8307-11e0-bc91-0002a5d5c51b FILE_GUID = 4ec8b120-8307-11e0-bc91-0002a5d5c51b
MODULE_TYPE = BASE MODULE_TYPE = BASE
VERSION_STRING = 1.0 VERSION_STRING = 1.0
LIBRARY_CLASS = PL011UartLib LIBRARY_CLASS = PL011UartLib
[Sources.common] [Sources.common]
PL011Uart.c PL011Uart.c
[LibraryClasses] [LibraryClasses]
IoLib DebugLib
IoLib
[Packages]
MdePkg/MdePkg.dec [Packages]
# MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec ArmPlatformPkg/ArmPlatformPkg.dec
[Pcd] [Pcd]
gArmPlatformTokenSpaceGuid.PL011UartClkInHz
gArmPlatformTokenSpaceGuid.PL011UartInteger
gArmPlatformTokenSpaceGuid.PL011UartFractional

329
ArmPlatformPkg/Include/Drivers/PL011Uart.h
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@ -1,141 +1,188 @@
/** @file /** @file
* *
* Copyright (c) 2011, ARM Limited. All rights reserved. * Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* *
* This program and the accompanying materials * This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License * are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at * which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php * http://opensource.org/licenses/bsd-license.php
* *
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
* *
**/ **/
#ifndef __PL011_UART_H__ #ifndef __PL011_UART_H__
#define __PL011_UART_H__ #define __PL011_UART_H__
// PL011 Registers #include <Uefi.h>
#define UARTDR 0x000 #include <Protocol/SerialIo.h>
#define UARTRSR 0x004
#define UARTECR 0x004 // PL011 Registers
#define UARTFR 0x018 #define UARTDR 0x000
#define UARTILPR 0x020 #define UARTRSR 0x004
#define UARTIBRD 0x024 #define UARTECR 0x004
#define UARTFBRD 0x028 #define UARTFR 0x018
#define UARTLCR_H 0x02C #define UARTILPR 0x020
#define UARTCR 0x030 #define UARTIBRD 0x024
#define UARTIFLS 0x034 #define UARTFBRD 0x028
#define UARTIMSC 0x038 #define UARTLCR_H 0x02C
#define UARTRIS 0x03C #define UARTCR 0x030
#define UARTMIS 0x040 #define UARTIFLS 0x034
#define UARTICR 0x044 #define UARTIMSC 0x038
#define UARTDMACR 0x048 #define UARTRIS 0x03C
#define UARTMIS 0x040
#define UART_115200_IDIV 13 // Integer Part #define UARTICR 0x044
#define UART_115200_FDIV 1 // Fractional Part #define UARTDMACR 0x048
#define UART_38400_IDIV 39
#define UART_38400_FDIV 5 // Data status bits
#define UART_19200_IDIV 12 #define UART_DATA_ERROR_MASK 0x0F00
#define UART_19200_FDIV 37
// Status reg bits
// Data status bits #define UART_STATUS_ERROR_MASK 0x0F
#define UART_DATA_ERROR_MASK 0x0F00
// Flag reg bits
// Status reg bits #define PL011_UARTFR_RI (1 << 8) // Ring indicator
#define UART_STATUS_ERROR_MASK 0x0F #define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty
#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full
// Flag reg bits #define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full
#define UART_TX_EMPTY_FLAG_MASK 0x80 #define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty
#define UART_RX_FULL_FLAG_MASK 0x40 #define PL011_UARTFR_BUSY (1 << 3) // UART busy
#define UART_TX_FULL_FLAG_MASK 0x20 #define PL011_UARTFR_DCD (1 << 2) // Data carrier detect
#define UART_RX_EMPTY_FLAG_MASK 0x10 #define PL011_UARTFR_DSR (1 << 1) // Data set ready
#define UART_BUSY_FLAG_MASK 0x08 #define PL011_UARTFR_CTS (1 << 0) // Clear to send
// Control reg bits // Flag reg bits - alternative names
#define PL011_UARTCR_CTSEN (1 << 15) // CTS hardware flow control enable #define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE
#define PL011_UARTCR_RTSEN (1 << 14) // RTS hardware flow control enable #define UART_RX_FULL_FLAG_MASK PL011_UARTFR_RXFF
#define PL011_UARTCR_RTS (1 << 11) // Request to send #define UART_TX_FULL_FLAG_MASK PL011_UARTFR_TXFF
#define PL011_UARTCR_DTR (1 << 10) // Data transmit ready. #define UART_RX_EMPTY_FLAG_MASK PL011_UARTFR_RXFE
#define PL011_UARTCR_RXE (1 << 9) // Receive enable #define UART_BUSY_FLAG_MASK PL011_UARTFR_BUSY
#define PL011_UARTCR_TXE (1 << 8) // Transmit enable
#define PL011_UARTCR_UARTEN (1 << 0) // UART Enable // Control reg bits
#define PL011_UARTCR_CTSEN (1 << 15) // CTS hardware flow control enable
// Line Control Register Bits #define PL011_UARTCR_RTSEN (1 << 14) // RTS hardware flow control enable
#define PL011_UARTLCR_H_SPS (1 << 7) // Stick parity select #define PL011_UARTCR_RTS (1 << 11) // Request to send
#define PL011_UARTLCR_H_WLEN_8 (3 << 5) #define PL011_UARTCR_DTR (1 << 10) // Data transmit ready.
#define PL011_UARTLCR_H_WLEN_7 (2 << 5) #define PL011_UARTCR_RXE (1 << 9) // Receive enable
#define PL011_UARTLCR_H_WLEN_6 (1 << 5) #define PL011_UARTCR_TXE (1 << 8) // Transmit enable
#define PL011_UARTLCR_H_WLEN_5 (0 << 5) #define PL011_UARTCR_LBE (1 << 7) // Loopback enable
#define PL011_UARTLCR_H_FEN (1 << 4) // FIFOs Enable #define PL011_UARTCR_UARTEN (1 << 0) // UART Enable
#define PL011_UARTLCR_H_STP2 (1 << 3) // Two stop bits select
#define PL011_UARTLCR_H_EPS (1 << 2) // Even parity select // Line Control Register Bits
#define PL011_UARTLCR_H_PEN (1 << 1) // Parity Enable #define PL011_UARTLCR_H_SPS (1 << 7) // Stick parity select
#define PL011_UARTLCR_H_BRK (1 << 0) // Send break #define PL011_UARTLCR_H_WLEN_8 (3 << 5)
#define PL011_UARTLCR_H_WLEN_7 (2 << 5)
/* #define PL011_UARTLCR_H_WLEN_6 (1 << 5)
#define PL011_UARTLCR_H_WLEN_5 (0 << 5)
Programmed hardware of Serial port. #define PL011_UARTLCR_H_FEN (1 << 4) // FIFOs Enable
#define PL011_UARTLCR_H_STP2 (1 << 3) // Two stop bits select
@return Always return EFI_UNSUPPORTED. #define PL011_UARTLCR_H_EPS (1 << 2) // Even parity select
#define PL011_UARTLCR_H_PEN (1 << 1) // Parity Enable
**/ #define PL011_UARTLCR_H_BRK (1 << 0) // Send break
RETURN_STATUS
EFIAPI /*
PL011UartInitialize (
IN UINTN UartBase, Programmed hardware of Serial port.
IN UINTN BaudRate,
IN UINTN LineControl @return Always return EFI_UNSUPPORTED.
);
**/
/** RETURN_STATUS
Write data to serial device. EFIAPI
PL011UartInitializePort (
@param Buffer Point of data buffer which need to be writed. IN UINTN UartBase,
@param NumberOfBytes Number of output bytes which are cached in Buffer. IN UINT64 BaudRate,
IN UINT32 ReceiveFifoDepth,
@retval 0 Write data failed. IN UINT32 Timeout,
@retval !0 Actual number of bytes writed to serial device. IN EFI_PARITY_TYPE Parity,
IN UINT8 DataBits,
**/ IN EFI_STOP_BITS_TYPE StopBits
UINTN );
EFIAPI
PL011UartWrite ( /**
IN UINTN UartBase, Set the serial device control bits.
IN UINT8 *Buffer,
IN UINTN NumberOfBytes @param UartBase The base address of the PL011 UART.
); @param Control Control bits which are to be set on the serial device.
/** @retval EFI_SUCCESS The new control bits were set on the serial device.
Read data from serial device and save the datas in buffer. @retval EFI_UNSUPPORTED The serial device does not support this operation.
@retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
@param Buffer Point of data buffer which need to be writed.
@param NumberOfBytes Number of output bytes which are cached in Buffer. **/
RETURN_STATUS
@retval 0 Read data failed. EFIAPI
@retval !0 Aactual number of bytes read from serial device. PL011UartSetControl (
IN UINTN UartBase,
**/ IN UINT32 Control
UINTN );
EFIAPI
PL011UartRead ( /**
IN UINTN UartBase, Get the serial device control bits.
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes @param UartBase The base address of the PL011 UART.
); @param Control Control signals read from the serial device.
/** @retval EFI_SUCCESS The control bits were read from the serial device.
Check to see if any data is avaiable to be read from the debug device. @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
@retval EFI_SUCCESS At least one byte of data is avaiable to be read **/
@retval EFI_NOT_READY No data is avaiable to be read RETURN_STATUS
@retval EFI_DEVICE_ERROR The serial device is not functioning properly EFIAPI
PL011UartGetControl (
**/ IN UINTN UartBase,
BOOLEAN OUT UINT32 *Control
EFIAPI );
PL011UartPoll (
IN UINTN UartBase /**
); Write data to serial device.
#endif @param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Write data failed.
@retval !0 Actual number of bytes written to serial device.
**/
UINTN
EFIAPI
PL011UartWrite (
IN UINTN UartBase,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
);
/**
Read data from serial device and save the data in buffer.
@param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Read data failed.
@retval !0 Actual number of bytes read from serial device.
**/
UINTN
EFIAPI
PL011UartRead (
IN UINTN UartBase,
OUT UINT8 *Buffer,
IN UINTN NumberOfBytes
);
/**
Check to see if any data is available to be read from the debug device.
@retval EFI_SUCCESS At least one byte of data is available to be read
@retval EFI_NOT_READY No data is available to be read
@retval EFI_DEVICE_ERROR The serial device is not functioning properly
**/
BOOLEAN
EFIAPI
PL011UartPoll (
IN UINTN UartBase
);
#endif

31
ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
View File

@ -1,8 +1,8 @@
/** @file /** @file
Serial I/O Port library functions with no library constructor/destructor Serial I/O Port library functions with no library constructor/destructor
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR> Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -14,7 +14,7 @@
**/ **/
#include <Include/Uefi.h> #include <Include/Base.h>
#include <Library/IoLib.h> #include <Library/IoLib.h>
#include <Library/PcdLib.h> #include <Library/PcdLib.h>
@ -27,7 +27,7 @@
Programmed hardware of Serial port. Programmed hardware of Serial port.
@return Always return EFI_UNSUPPORTED. @return Always return RETURN_UNSUPPORTED.
**/ **/
RETURN_STATUS RETURN_STATUS
@ -36,21 +36,24 @@ SerialPortInitialize (
VOID VOID
) )
{ {
// No parity, 1 stop, no fifo, 8 data bits return PL011UartInitializePort (
return PL011UartInitialize (
(UINTN)PcdGet64 (PcdSerialRegisterBase), (UINTN)PcdGet64 (PcdSerialRegisterBase),
(UINTN)PcdGet64 (PcdUartDefaultBaudRate), (UINTN)PcdGet64 (PcdUartDefaultBaudRate),
PL011_UARTLCR_H_WLEN_8); 0, // Use the default value for Fifo depth
0, // Use the default value for Timeout,
(EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity),
PcdGet8 (PcdUartDefaultDataBits),
(EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits));
} }
/** /**
Write data to serial device. Write data to serial device.
@param Buffer Point of data buffer which need to be writed. @param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer. @param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Write data failed. @retval 0 Write data failed.
@retval !0 Actual number of bytes writed to serial device. @retval !0 Actual number of bytes written to serial device.
**/ **/
UINTN UINTN
@ -64,13 +67,13 @@ SerialPortWrite (
} }
/** /**
Read data from serial device and save the datas in buffer. Read data from serial device and save the data in buffer.
@param Buffer Point of data buffer which need to be writed. @param Buffer Point of data buffer which need to be written.
@param NumberOfBytes Number of output bytes which are cached in Buffer. @param NumberOfBytes Number of output bytes which are cached in Buffer.
@retval 0 Read data failed. @retval 0 Read data failed.
@retval !0 Aactual number of bytes read from serial device. @retval !0 Actual number of bytes read from serial device.
**/ **/
UINTN UINTN
@ -84,10 +87,10 @@ SerialPortRead (
} }
/** /**
Check to see if any data is avaiable to be read from the debug device. Check to see if any data is available to be read from the debug device.
@retval EFI_SUCCESS At least one byte of data is avaiable to be read @retval EFI_SUCCESS At least one byte of data is available to be read
@retval EFI_NOT_READY No data is avaiable to be read @retval EFI_NOT_READY No data is available to be read
@retval EFI_DEVICE_ERROR The serial device is not functioning properly @retval EFI_DEVICE_ERROR The serial device is not functioning properly
**/ **/

80
ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
View File

@ -1,38 +1,42 @@
#/** @file #/** @file
# #
# Component discription file for NorFlashDxe module # Component description file for PL011SerialPortLib module
# #
# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> # Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
# This program and the accompanying materials #
# are licensed and made available under the terms and conditions of the BSD License # This program and the accompanying materials
# which accompanies this distribution. The full text of the license may be found at # are licensed and made available under the terms and conditions of the BSD License
# http://opensource.org/licenses/bsd-license.php # which accompanies this distribution. The full text of the license may be found at
# # http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, #
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#**/ #
#**/
[Defines]
INF_VERSION = 0x00010005 [Defines]
BASE_NAME = PL011SerialPortLib INF_VERSION = 0x00010005
FILE_GUID = 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f BASE_NAME = PL011SerialPortLib
MODULE_TYPE = BASE FILE_GUID = 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f
VERSION_STRING = 1.0 MODULE_TYPE = BASE
LIBRARY_CLASS = SerialPortLib VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib
[Sources.common]
PL011SerialPortLib.c [Sources.common]
PL011SerialPortLib.c
[LibraryClasses]
PL011UartLib [LibraryClasses]
PcdLib PL011UartLib
PcdLib
[Packages]
MdePkg/MdePkg.dec [Packages]
MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec MdeModulePkg/MdeModulePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase [Pcd]
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits