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UefiCpuPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiCpuPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:17 -08:00
committed by mergify[bot]
parent 91415a36ae
commit 053e878bfb
143 changed files with 14130 additions and 13035 deletions
Download Patch File Download Diff File Expand all files Collapse all files

422
UefiCpuPkg/CpuDxe/CpuDxe.c
View File

@@ -13,15 +13,15 @@
//
// Global Variables
//
BOOLEAN InterruptState = FALSE;
EFI_HANDLE mCpuHandle = NULL;
BOOLEAN mIsFlushingGCD;
BOOLEAN mIsAllocatingPageTable = FALSE;
UINT64 mValidMtrrAddressMask;
UINT64 mValidMtrrBitsMask;
UINT64 mTimerPeriod = 0;
BOOLEAN InterruptState = FALSE;
EFI_HANDLE mCpuHandle = NULL;
BOOLEAN mIsFlushingGCD;
BOOLEAN mIsAllocatingPageTable = FALSE;
UINT64 mValidMtrrAddressMask;
UINT64 mValidMtrrBitsMask;
UINT64 mTimerPeriod = 0;
FIXED_MTRR mFixedMtrrTable[] = {
FIXED_MTRR mFixedMtrrTable[] = {
{
MSR_IA32_MTRR_FIX64K_00000,
0,
@@ -79,7 +79,6 @@ FIXED_MTRR mFixedMtrrTable[] = {
},
};
EFI_CPU_ARCH_PROTOCOL gCpu = {
CpuFlushCpuDataCache,
CpuEnableInterrupt,
@@ -115,10 +114,10 @@ EFI_CPU_ARCH_PROTOCOL gCpu = {
EFI_STATUS
EFIAPI
CpuFlushCpuDataCache (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
)
{
if (FlushType == EfiCpuFlushTypeWriteBackInvalidate) {
@@ -132,7 +131,6 @@ CpuFlushCpuDataCache (
}
}
/**
Enables CPU interrupts.
@@ -145,7 +143,7 @@ CpuFlushCpuDataCache (
EFI_STATUS
EFIAPI
CpuEnableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
)
{
EnableInterrupts ();
@@ -154,7 +152,6 @@ CpuEnableInterrupt (
return EFI_SUCCESS;
}
/**
Disables CPU interrupts.
@@ -167,7 +164,7 @@ CpuEnableInterrupt (
EFI_STATUS
EFIAPI
CpuDisableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
)
{
DisableInterrupts ();
@@ -176,7 +173,6 @@ CpuDisableInterrupt (
return EFI_SUCCESS;
}
/**
Return the state of interrupts.
@@ -190,8 +186,8 @@ CpuDisableInterrupt (
EFI_STATUS
EFIAPI
CpuGetInterruptState (
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
)
{
if (State == NULL) {
@@ -202,7 +198,6 @@ CpuGetInterruptState (
return EFI_SUCCESS;
}
/**
Generates an INIT to the CPU.
@@ -218,14 +213,13 @@ CpuGetInterruptState (
EFI_STATUS
EFIAPI
CpuInit (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
)
{
return EFI_UNSUPPORTED;
}
/**
Registers a function to be called from the CPU interrupt handler.
@@ -249,15 +243,14 @@ CpuInit (
EFI_STATUS
EFIAPI
CpuRegisterInterruptHandler (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
)
{
return RegisterCpuInterruptHandler (InterruptType, InterruptHandler);
}
/**
Returns a timer value from one of the CPU's internal timers. There is no
inherent time interval between ticks but is a function of the CPU frequency.
@@ -284,14 +277,14 @@ CpuRegisterInterruptHandler (
EFI_STATUS
EFIAPI
CpuGetTimerValue (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
)
{
UINT64 BeginValue;
UINT64 EndValue;
UINT64 BeginValue;
UINT64 EndValue;
if (TimerValue == NULL) {
return EFI_INVALID_PARAMETER;
@@ -310,7 +303,7 @@ CpuGetTimerValue (
//
BeginValue = AsmReadTsc ();
MicroSecondDelay (100);
EndValue = AsmReadTsc ();
EndValue = AsmReadTsc ();
//
// Calculate the actual frequency
//
@@ -323,6 +316,7 @@ CpuGetTimerValue (
NULL
);
}
*TimerPeriod = mTimerPeriod;
}
@@ -339,7 +333,7 @@ CpuGetTimerValue (
VOID
EFIAPI
SetMtrrsFromBuffer (
IN VOID *Buffer
IN VOID *Buffer
)
{
MtrrSetAllMtrrs (Buffer);
@@ -373,10 +367,10 @@ SetMtrrsFromBuffer (
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
)
{
RETURN_STATUS Status;
@@ -395,7 +389,7 @@ CpuSetMemoryAttributes (
// to avoid unnecessary computing.
//
if (mIsFlushingGCD) {
DEBUG((DEBUG_VERBOSE, " Flushing GCD\n"));
DEBUG ((DEBUG_VERBOSE, " Flushing GCD\n"));
return EFI_SUCCESS;
}
@@ -410,11 +404,11 @@ CpuSetMemoryAttributes (
// by page table memory allocation.
//
if (mIsAllocatingPageTable) {
DEBUG((DEBUG_VERBOSE, " Allocating page table memory\n"));
DEBUG ((DEBUG_VERBOSE, " Allocating page table memory\n"));
return EFI_SUCCESS;
}
CacheAttributes = Attributes & EFI_CACHE_ATTRIBUTE_MASK;
CacheAttributes = Attributes & EFI_CACHE_ATTRIBUTE_MASK;
MemoryAttributes = Attributes & EFI_MEMORY_ATTRIBUTE_MASK;
if (Attributes != (CacheAttributes | MemoryAttributes)) {
@@ -427,30 +421,31 @@ CpuSetMemoryAttributes (
}
switch (CacheAttributes) {
case EFI_MEMORY_UC:
CacheType = CacheUncacheable;
break;
case EFI_MEMORY_UC:
CacheType = CacheUncacheable;
break;
case EFI_MEMORY_WC:
CacheType = CacheWriteCombining;
break;
case EFI_MEMORY_WC:
CacheType = CacheWriteCombining;
break;
case EFI_MEMORY_WT:
CacheType = CacheWriteThrough;
break;
case EFI_MEMORY_WT:
CacheType = CacheWriteThrough;
break;
case EFI_MEMORY_WP:
CacheType = CacheWriteProtected;
break;
case EFI_MEMORY_WP:
CacheType = CacheWriteProtected;
break;
case EFI_MEMORY_WB:
CacheType = CacheWriteBack;
break;
case EFI_MEMORY_WB:
CacheType = CacheWriteBack;
break;
default:
return EFI_INVALID_PARAMETER;
default:
return EFI_INVALID_PARAMETER;
}
CurrentCacheType = MtrrGetMemoryAttribute(BaseAddress);
CurrentCacheType = MtrrGetMemoryAttribute (BaseAddress);
if (CurrentCacheType != CacheType) {
//
// call MTRR library function
@@ -484,7 +479,8 @@ CpuSetMemoryAttributes (
ASSERT (MpStatus == EFI_SUCCESS || MpStatus == EFI_NOT_STARTED);
}
}
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
}
@@ -507,15 +503,15 @@ InitializeMtrrMask (
VOID
)
{
UINT32 RegEax;
UINT8 PhysicalAddressBits;
UINT32 RegEax;
UINT8 PhysicalAddressBits;
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
PhysicalAddressBits = (UINT8)RegEax;
} else {
PhysicalAddressBits = 36;
}
@@ -536,22 +532,22 @@ InitializeMtrrMask (
**/
UINT64
GetMemorySpaceAttributeFromMtrrType (
IN UINT8 MtrrAttributes
IN UINT8 MtrrAttributes
)
{
switch (MtrrAttributes) {
case MTRR_CACHE_UNCACHEABLE:
return EFI_MEMORY_UC;
case MTRR_CACHE_WRITE_COMBINING:
return EFI_MEMORY_WC;
case MTRR_CACHE_WRITE_THROUGH:
return EFI_MEMORY_WT;
case MTRR_CACHE_WRITE_PROTECTED:
return EFI_MEMORY_WP;
case MTRR_CACHE_WRITE_BACK:
return EFI_MEMORY_WB;
default:
return 0;
case MTRR_CACHE_UNCACHEABLE:
return EFI_MEMORY_UC;
case MTRR_CACHE_WRITE_COMBINING:
return EFI_MEMORY_WC;
case MTRR_CACHE_WRITE_THROUGH:
return EFI_MEMORY_WT;
case MTRR_CACHE_WRITE_PROTECTED:
return EFI_MEMORY_WP;
case MTRR_CACHE_WRITE_BACK:
return EFI_MEMORY_WB;
default:
return 0;
}
}
@@ -575,29 +571,33 @@ GetMemorySpaceAttributeFromMtrrType (
**/
EFI_STATUS
SearchGcdMemorySpaces (
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
OUT UINTN *StartIndex,
OUT UINTN *EndIndex
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
OUT UINTN *StartIndex,
OUT UINTN *EndIndex
)
{
UINTN Index;
UINTN Index;
*StartIndex = 0;
*EndIndex = 0;
for (Index = 0; Index < NumberOfDescriptors; Index++) {
if (BaseAddress >= MemorySpaceMap[Index].BaseAddress &&
BaseAddress < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
(BaseAddress < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))
{
*StartIndex = Index;
}
if (BaseAddress + Length - 1 >= MemorySpaceMap[Index].BaseAddress &&
BaseAddress + Length - 1 < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
if ((BaseAddress + Length - 1 >= MemorySpaceMap[Index].BaseAddress) &&
(BaseAddress + Length - 1 < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))
{
*EndIndex = Index;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
@@ -619,11 +619,11 @@ SearchGcdMemorySpaces (
**/
EFI_STATUS
SetGcdMemorySpaceAttributes (
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
)
{
EFI_STATUS Status;
@@ -655,6 +655,7 @@ SetGcdMemorySpaceAttributes (
if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
continue;
}
//
// Calculate the start and end address of the overlapping range
//
@@ -663,11 +664,13 @@ SetGcdMemorySpaceAttributes (
} else {
RegionStart = MemorySpaceMap[Index].BaseAddress;
}
if (BaseAddress + Length - 1 < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
RegionLength = BaseAddress + Length - RegionStart;
} else {
RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
}
//
// Set memory attributes according to MTRR attribute and the original attribute of descriptor
//
@@ -681,7 +684,6 @@ SetGcdMemorySpaceAttributes (
return EFI_SUCCESS;
}
/**
Refreshes the GCD Memory Space attributes according to MTRRs.
@@ -693,22 +695,22 @@ RefreshMemoryAttributesFromMtrr (
VOID
)
{
EFI_STATUS Status;
UINTN Index;
UINTN SubIndex;
UINT64 RegValue;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
UINT64 Attributes;
UINT64 CurrentAttributes;
UINT8 MtrrType;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
UINT64 DefaultAttributes;
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
MTRR_FIXED_SETTINGS MtrrFixedSettings;
UINT32 FirmwareVariableMtrrCount;
UINT8 DefaultMemoryType;
EFI_STATUS Status;
UINTN Index;
UINTN SubIndex;
UINT64 RegValue;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINT64 Length;
UINT64 Attributes;
UINT64 CurrentAttributes;
UINT8 MtrrType;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
UINT64 DefaultAttributes;
VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
MTRR_FIXED_SETTINGS MtrrFixedSettings;
UINT32 FirmwareVariableMtrrCount;
UINT8 DefaultMemoryType;
FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
ASSERT (FirmwareVariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
@@ -738,7 +740,7 @@ RefreshMemoryAttributesFromMtrr (
);
ASSERT_EFI_ERROR (Status);
DefaultMemoryType = (UINT8) MtrrGetDefaultMemoryType ();
DefaultMemoryType = (UINT8)MtrrGetDefaultMemoryType ();
DefaultAttributes = GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType);
//
@@ -748,6 +750,7 @@ RefreshMemoryAttributesFromMtrr (
if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
continue;
}
gDS->SetMemorySpaceAttributes (
MemorySpaceMap[Index].BaseAddress,
MemorySpaceMap[Index].Length,
@@ -761,7 +764,8 @@ RefreshMemoryAttributesFromMtrr (
//
for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid &&
VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) {
(VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK))
{
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
@@ -777,9 +781,10 @@ RefreshMemoryAttributesFromMtrr (
//
for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid &&
VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK &&
VariableMtrr[Index].Type != MTRR_CACHE_UNCACHEABLE) {
Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type);
(VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK) &&
(VariableMtrr[Index].Type != MTRR_CACHE_UNCACHEABLE))
{
Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8)VariableMtrr[Index].Type);
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
@@ -795,7 +800,8 @@ RefreshMemoryAttributesFromMtrr (
//
for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
if (VariableMtrr[Index].Valid &&
VariableMtrr[Index].Type == MTRR_CACHE_UNCACHEABLE) {
(VariableMtrr[Index].Type == MTRR_CACHE_UNCACHEABLE))
{
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
@@ -819,7 +825,7 @@ RefreshMemoryAttributesFromMtrr (
// Check for continuous fixed MTRR sections
//
for (SubIndex = 0; SubIndex < 8; SubIndex++) {
MtrrType = (UINT8) RShiftU64 (RegValue, SubIndex * 8);
MtrrType = (UINT8)RShiftU64 (RegValue, SubIndex * 8);
CurrentAttributes = GetMemorySpaceAttributeFromMtrrType (MtrrType);
if (Length == 0) {
//
@@ -839,13 +845,15 @@ RefreshMemoryAttributesFromMtrr (
Attributes
);
BaseAddress = mFixedMtrrTable[Index].BaseAddress + mFixedMtrrTable[Index].Length * SubIndex;
Length = 0;
Attributes = CurrentAttributes;
Length = 0;
Attributes = CurrentAttributes;
}
}
Length += mFixedMtrrTable[Index].Length;
}
}
//
// Handle the last fixed MTRR region
//
@@ -916,20 +924,20 @@ InitInterruptDescriptorTable (
VOID
)
{
EFI_STATUS Status;
EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
EFI_STATUS Status;
EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
VectorInfo = NULL;
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **) &VectorInfoList);
if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if ((Status == EFI_SUCCESS) && (VectorInfoList != NULL)) {
VectorInfo = VectorInfoList;
}
Status = InitializeCpuInterruptHandlers (VectorInfo);
ASSERT_EFI_ERROR (Status);
}
/**
Callback function for idle events.
@@ -941,8 +949,8 @@ InitInterruptDescriptorTable (
VOID
EFIAPI
IdleLoopEventCallback (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
CpuSleep ();
@@ -989,24 +997,27 @@ IdleLoopEventCallback (
**/
EFI_STATUS
IntersectMemoryDescriptor (
IN UINT64 Base,
IN UINT64 Length,
IN UINT64 Capabilities,
IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor
IN UINT64 Base,
IN UINT64 Length,
IN UINT64 Capabilities,
IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor
)
{
UINT64 IntersectionBase;
UINT64 IntersectionEnd;
EFI_STATUS Status;
UINT64 IntersectionBase;
UINT64 IntersectionEnd;
EFI_STATUS Status;
if (Descriptor->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo &&
(Descriptor->Capabilities & Capabilities) == Capabilities) {
if ((Descriptor->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) &&
((Descriptor->Capabilities & Capabilities) == Capabilities))
{
return EFI_SUCCESS;
}
IntersectionBase = MAX (Base, Descriptor->BaseAddress);
IntersectionEnd = MIN (Base + Length,
Descriptor->BaseAddress + Descriptor->Length);
IntersectionEnd = MIN (
Base + Length,
Descriptor->BaseAddress + Descriptor->Length
);
if (IntersectionBase >= IntersectionEnd) {
//
// The descriptor and the aperture don't overlap.
@@ -1015,21 +1026,39 @@ IntersectMemoryDescriptor (
}
if (Descriptor->GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo,
IntersectionBase, IntersectionEnd - IntersectionBase,
Capabilities);
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
IntersectionBase,
IntersectionEnd - IntersectionBase,
Capabilities
);
DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
"%a: %a: add [%Lx, %Lx): %r\n", gEfiCallerBaseName, __FUNCTION__,
IntersectionBase, IntersectionEnd, Status));
DEBUG ((
EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE,
"%a: %a: add [%Lx, %Lx): %r\n",
gEfiCallerBaseName,
__FUNCTION__,
IntersectionBase,
IntersectionEnd,
Status
));
return Status;
}
DEBUG ((DEBUG_ERROR, "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
"with aperture [%Lx, %Lx) cap %Lx\n", gEfiCallerBaseName, __FUNCTION__,
Descriptor->BaseAddress, Descriptor->BaseAddress + Descriptor->Length,
(UINT32)Descriptor->GcdMemoryType, Descriptor->Capabilities,
Base, Base + Length, Capabilities));
DEBUG ((
DEBUG_ERROR,
"%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
"with aperture [%Lx, %Lx) cap %Lx\n",
gEfiCallerBaseName,
__FUNCTION__,
Descriptor->BaseAddress,
Descriptor->BaseAddress + Descriptor->Length,
(UINT32)Descriptor->GcdMemoryType,
Descriptor->Capabilities,
Base,
Base + Length,
Capabilities
));
return EFI_INVALID_PARAMETER;
}
@@ -1046,49 +1075,60 @@ IntersectMemoryDescriptor (
**/
EFI_STATUS
AddMemoryMappedIoSpace (
IN UINT64 Base,
IN UINT64 Length,
IN UINT64 Capabilities
IN UINT64 Base,
IN UINT64 Length,
IN UINT64 Capabilities
)
{
EFI_STATUS Status;
UINTN Index;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
EFI_STATUS Status;
UINTN Index;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: %a: GetMemorySpaceMap(): %r\n",
gEfiCallerBaseName, __FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: %a: GetMemorySpaceMap(): %r\n",
gEfiCallerBaseName,
__FUNCTION__,
Status
));
return Status;
}
for (Index = 0; Index < NumberOfDescriptors; Index++) {
Status = IntersectMemoryDescriptor (Base, Length, Capabilities,
&MemorySpaceMap[Index]);
Status = IntersectMemoryDescriptor (
Base,
Length,
Capabilities,
&MemorySpaceMap[Index]
);
if (EFI_ERROR (Status)) {
goto FreeMemorySpaceMap;
}
}
DEBUG_CODE_BEGIN ();
//
// Make sure there are adjacent descriptors covering [Base, Base + Length).
// It is possible that they have not been merged; merging can be prevented
// by allocation and different capabilities.
//
UINT64 CheckBase;
EFI_STATUS CheckStatus;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
//
// Make sure there are adjacent descriptors covering [Base, Base + Length).
// It is possible that they have not been merged; merging can be prevented
// by allocation and different capabilities.
//
UINT64 CheckBase;
EFI_STATUS CheckStatus;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor;
for (CheckBase = Base;
CheckBase < Base + Length;
CheckBase = Descriptor.BaseAddress + Descriptor.Length)
{
CheckStatus = gDS->GetMemorySpaceDescriptor (CheckBase, &Descriptor);
ASSERT_EFI_ERROR (CheckStatus);
ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);
ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);
}
for (CheckBase = Base;
CheckBase < Base + Length;
CheckBase = Descriptor.BaseAddress + Descriptor.Length) {
CheckStatus = gDS->GetMemorySpaceDescriptor (CheckBase, &Descriptor);
ASSERT_EFI_ERROR (CheckStatus);
ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);
ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);
}
DEBUG_CODE_END ();
FreeMemorySpaceMap:
@@ -1105,14 +1145,14 @@ FreeMemorySpaceMap:
**/
VOID
AddLocalApicMemorySpace (
IN EFI_HANDLE ImageHandle
IN EFI_HANDLE ImageHandle
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS BaseAddress;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS BaseAddress;
BaseAddress = (EFI_PHYSICAL_ADDRESS) GetLocalApicBaseAddress();
Status = AddMemoryMappedIoSpace (BaseAddress, SIZE_4KB, EFI_MEMORY_UC);
BaseAddress = (EFI_PHYSICAL_ADDRESS)GetLocalApicBaseAddress ();
Status = AddMemoryMappedIoSpace (BaseAddress, SIZE_4KB, EFI_MEMORY_UC);
ASSERT_EFI_ERROR (Status);
//
@@ -1130,8 +1170,13 @@ AddLocalApicMemorySpace (
NULL
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "%a: %a: AllocateMemorySpace() Status - %r\n",
gEfiCallerBaseName, __FUNCTION__, Status));
DEBUG ((
DEBUG_INFO,
"%a: %a: AllocateMemorySpace() Status - %r\n",
gEfiCallerBaseName,
__FUNCTION__,
Status
));
}
}
@@ -1149,14 +1194,14 @@ AddLocalApicMemorySpace (
EFI_STATUS
EFIAPI
InitializeCpu (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT IdleLoopEvent;
InitializePageTableLib();
InitializePageTableLib ();
InitializeFloatingPointUnits ();
@@ -1180,7 +1225,8 @@ InitializeCpu (
//
Status = gBS->InstallMultipleProtocolInterfaces (
&mCpuHandle,
&gEfiCpuArchProtocolGuid, &gCpu,
&gEfiCpuArchProtocolGuid,
&gCpu,
NULL
);
ASSERT_EFI_ERROR (Status);

59
UefiCpuPkg/CpuDxe/CpuDxe.h
View File

@@ -63,10 +63,10 @@
EFI_STATUS
EFIAPI
CpuFlushCpuDataCache (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
);
/**
@@ -81,7 +81,7 @@ CpuFlushCpuDataCache (
EFI_STATUS
EFIAPI
CpuEnableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
);
/**
@@ -96,7 +96,7 @@ CpuEnableInterrupt (
EFI_STATUS
EFIAPI
CpuDisableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
);
/**
@@ -112,8 +112,8 @@ CpuDisableInterrupt (
EFI_STATUS
EFIAPI
CpuGetInterruptState (
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
);
/**
@@ -131,8 +131,8 @@ CpuGetInterruptState (
EFI_STATUS
EFIAPI
CpuInit (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
);
/**
@@ -158,9 +158,9 @@ CpuInit (
EFI_STATUS
EFIAPI
CpuRegisterInterruptHandler (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
/**
@@ -189,10 +189,10 @@ CpuRegisterInterruptHandler (
EFI_STATUS
EFIAPI
CpuGetTimerValue (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
);
/**
@@ -214,10 +214,10 @@ CpuGetTimerValue (
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
);
/**
@@ -238,7 +238,7 @@ InitGlobalDescriptorTable (
VOID
EFIAPI
SetCodeSelector (
UINT16 Selector
UINT16 Selector
);
/**
@@ -250,7 +250,7 @@ SetCodeSelector (
VOID
EFIAPI
SetDataSelectors (
UINT16 Selector
UINT16 Selector
);
/**
@@ -273,8 +273,8 @@ RefreshGcdMemoryAttributesFromPaging (
VOID
EFIAPI
DebugExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
);
/**
@@ -289,12 +289,11 @@ DebugExceptionHandler (
VOID
EFIAPI
PageFaultExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
);
extern BOOLEAN mIsAllocatingPageTable;
extern UINTN mNumberOfProcessors;
extern BOOLEAN mIsAllocatingPageTable;
extern UINTN mNumberOfProcessors;
#endif

8
UefiCpuPkg/CpuDxe/CpuGdt.c
View File

@@ -13,7 +13,7 @@
//
// Global descriptor table (GDT) Template
//
STATIC GDT_ENTRIES mGdtTemplate = {
STATIC GDT_ENTRIES mGdtTemplate = {
//
// NULL_SEL
//
@@ -143,7 +143,7 @@ InitGlobalDescriptorTable (
);
ASSERT_EFI_ERROR (Status);
ASSERT ((Memory != 0) && (Memory < SIZE_4GB));
Gdt = (GDT_ENTRIES *) (UINTN) Memory;
Gdt = (GDT_ENTRIES *)(UINTN)Memory;
//
// Initialize all GDT entries
@@ -153,8 +153,8 @@ InitGlobalDescriptorTable (
//
// Write GDT register
//
Gdtr.Base = (UINT32) (UINTN) Gdt;
Gdtr.Limit = (UINT16) (sizeof (mGdtTemplate) - 1);
Gdtr.Base = (UINT32)(UINTN)Gdt;
Gdtr.Limit = (UINT16)(sizeof (mGdtTemplate) - 1);
AsmWriteGdtr (&Gdtr);
//

61
UefiCpuPkg/CpuDxe/CpuGdt.h
View File

@@ -21,48 +21,47 @@
//
typedef struct _GDT_ENTRY {
UINT16 Limit15_0;
UINT16 Base15_0;
UINT8 Base23_16;
UINT8 Type;
UINT8 Limit19_16_and_flags;
UINT8 Base31_24;
UINT16 Limit15_0;
UINT16 Base15_0;
UINT8 Base23_16;
UINT8 Type;
UINT8 Limit19_16_and_flags;
UINT8 Base31_24;
} GDT_ENTRY;
typedef
struct _GDT_ENTRIES {
GDT_ENTRY Null;
GDT_ENTRY Linear;
GDT_ENTRY LinearCode;
GDT_ENTRY SysData;
GDT_ENTRY SysCode;
GDT_ENTRY SysCode16;
GDT_ENTRY LinearData64;
GDT_ENTRY LinearCode64;
GDT_ENTRY Spare5;
struct _GDT_ENTRIES {
GDT_ENTRY Null;
GDT_ENTRY Linear;
GDT_ENTRY LinearCode;
GDT_ENTRY SysData;
GDT_ENTRY SysCode;
GDT_ENTRY SysCode16;
GDT_ENTRY LinearData64;
GDT_ENTRY LinearCode64;
GDT_ENTRY Spare5;
} GDT_ENTRIES;
#pragma pack ()
#define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
#define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
#define SYS_CODE16_SEL OFFSET_OF (GDT_ENTRIES, SysCode16)
#define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)
#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
#define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
#define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
#define SYS_CODE16_SEL OFFSET_OF (GDT_ENTRIES, SysCode16)
#define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)
#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
#if defined (MDE_CPU_IA32)
#define CPU_CODE_SEL LINEAR_CODE_SEL
#define CPU_DATA_SEL LINEAR_SEL
#define CPU_CODE_SEL LINEAR_CODE_SEL
#define CPU_DATA_SEL LINEAR_SEL
#elif defined (MDE_CPU_X64)
#define CPU_CODE_SEL LINEAR_CODE64_SEL
#define CPU_DATA_SEL LINEAR_DATA64_SEL
#define CPU_CODE_SEL LINEAR_CODE64_SEL
#define CPU_DATA_SEL LINEAR_DATA64_SEL
#else
#error CPU type not supported for CPU GDT initialization!
#error CPU type not supported for CPU GDT initialization!
#endif
#endif // _CPU_GDT_H_

95
UefiCpuPkg/CpuDxe/CpuMp.c
View File

@@ -9,8 +9,8 @@
#include "CpuDxe.h"
#include "CpuMp.h"
EFI_HANDLE mMpServiceHandle = NULL;
UINTN mNumberOfProcessors = 1;
EFI_HANDLE mMpServiceHandle = NULL;
UINTN mNumberOfProcessors = 1;
EFI_MP_SERVICES_PROTOCOL mMpServicesTemplate = {
GetNumberOfProcessors,
@@ -509,7 +509,7 @@ WhoAmI (
OUT UINTN *ProcessorNumber
)
{
return MpInitLibWhoAmI (ProcessorNumber);;
return MpInitLibWhoAmI (ProcessorNumber);
}
/**
@@ -547,8 +547,8 @@ CollectBistDataFromHob (
// Sec Platform Information2 PPI includes BSP/APs' BIST information
//
SecPlatformInformation2 = GET_GUID_HOB_DATA (GuidHob);
NumberOfData = SecPlatformInformation2->NumberOfCpus;
CpuInstance = SecPlatformInformation2->CpuInstance;
NumberOfData = SecPlatformInformation2->NumberOfCpus;
CpuInstance = SecPlatformInformation2->CpuInstance;
} else {
//
// Otherwise, get gEfiSecPlatformInformationPpiGuid Guided HOB
@@ -556,14 +556,14 @@ CollectBistDataFromHob (
GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);
if (GuidHob != NULL) {
SecPlatformInformation = GET_GUID_HOB_DATA (GuidHob);
NumberOfData = 1;
NumberOfData = 1;
//
// SEC Platform Information only includes BSP's BIST information
// does not have BSP's APIC ID
//
BspCpuInstance.CpuLocation = GetApicId ();
BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
CpuInstance = &BspCpuInstance;
BspCpuInstance.CpuLocation = GetApicId ();
BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
CpuInstance = &BspCpuInstance;
} else {
DEBUG ((DEBUG_INFO, "Does not find any HOB stored CPU BIST information!\n"));
//
@@ -583,6 +583,7 @@ CollectBistDataFromHob (
BistData = CpuInstance[CpuInstanceNumber].InfoRecord.IA32HealthFlags;
}
}
if (BistData.Uint32 != 0) {
//
// Report Status Code that self test is failed
@@ -607,7 +608,7 @@ CollectBistDataFromHob (
VOID
EFIAPI
GetGdtr (
IN OUT VOID *Buffer
IN OUT VOID *Buffer
)
{
AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer);
@@ -625,12 +626,12 @@ GetGdtr (
VOID
EFIAPI
InitializeExceptionStackSwitchHandlers (
IN OUT VOID *Buffer
IN OUT VOID *Buffer
)
{
CPU_EXCEPTION_INIT_DATA *EssData;
IA32_DESCRIPTOR Idtr;
EFI_STATUS Status;
CPU_EXCEPTION_INIT_DATA *EssData;
IA32_DESCRIPTOR Idtr;
EFI_STATUS Status;
EssData = Buffer;
//
@@ -638,9 +639,9 @@ InitializeExceptionStackSwitchHandlers (
// the AP's IDT is the same as BSP's IDT either.
//
AsmReadIdtr (&Idtr);
EssData->Ia32.IdtTable = (VOID *)Idtr.Base;
EssData->Ia32.IdtTable = (VOID *)Idtr.Base;
EssData->Ia32.IdtTableSize = Idtr.Limit + 1;
Status = InitializeCpuExceptionHandlersEx (NULL, EssData);
Status = InitializeCpuExceptionHandlersEx (NULL, EssData);
ASSERT_EFI_ERROR (Status);
}
@@ -656,19 +657,19 @@ InitializeMpExceptionStackSwitchHandlers (
VOID
)
{
UINTN Index;
UINTN Bsp;
UINTN ExceptionNumber;
UINTN OldGdtSize;
UINTN NewGdtSize;
UINTN NewStackSize;
IA32_DESCRIPTOR Gdtr;
CPU_EXCEPTION_INIT_DATA EssData;
UINT8 *GdtBuffer;
UINT8 *StackTop;
UINTN Index;
UINTN Bsp;
UINTN ExceptionNumber;
UINTN OldGdtSize;
UINTN NewGdtSize;
UINTN NewStackSize;
IA32_DESCRIPTOR Gdtr;
CPU_EXCEPTION_INIT_DATA EssData;
UINT8 *GdtBuffer;
UINT8 *StackTop;
ExceptionNumber = FixedPcdGetSize (PcdCpuStackSwitchExceptionList);
NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
StackTop = AllocateRuntimeZeroPool (NewStackSize * mNumberOfProcessors);
ASSERT (StackTop != NULL);
@@ -678,17 +679,17 @@ InitializeMpExceptionStackSwitchHandlers (
// The default exception handlers must have been initialized. Let's just skip
// it in this method.
//
EssData.Ia32.Revision = CPU_EXCEPTION_INIT_DATA_REV;
EssData.Ia32.Revision = CPU_EXCEPTION_INIT_DATA_REV;
EssData.Ia32.InitDefaultHandlers = FALSE;
EssData.Ia32.StackSwitchExceptions = FixedPcdGetPtr(PcdCpuStackSwitchExceptionList);
EssData.Ia32.StackSwitchExceptions = FixedPcdGetPtr (PcdCpuStackSwitchExceptionList);
EssData.Ia32.StackSwitchExceptionNumber = ExceptionNumber;
EssData.Ia32.KnownGoodStackSize = FixedPcdGet32(PcdCpuKnownGoodStackSize);
EssData.Ia32.KnownGoodStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize);
//
// Initialize Gdtr to suppress incorrect compiler/analyzer warnings.
//
Gdtr.Base = 0;
Gdtr.Base = 0;
Gdtr.Limit = 0;
MpInitLibWhoAmI (&Bsp);
for (Index = 0; Index < mNumberOfProcessors; ++Index) {
@@ -733,7 +734,7 @@ InitializeMpExceptionStackSwitchHandlers (
// | |
// --------------------------------
//
OldGdtSize = Gdtr.Limit + 1;
OldGdtSize = Gdtr.Limit + 1;
EssData.Ia32.ExceptionTssDescSize = sizeof (IA32_TSS_DESCRIPTOR) *
(ExceptionNumber + 1);
EssData.Ia32.ExceptionTssSize = sizeof (IA32_TASK_STATE_SEGMENT) *
@@ -749,19 +750,21 @@ InitializeMpExceptionStackSwitchHandlers (
//
// Make sure GDT table alignment
//
EssData.Ia32.GdtTable = ALIGN_POINTER(GdtBuffer, sizeof (IA32_TSS_DESCRIPTOR));
NewGdtSize -= ((UINT8 *)EssData.Ia32.GdtTable - GdtBuffer);
EssData.Ia32.GdtTable = ALIGN_POINTER (GdtBuffer, sizeof (IA32_TSS_DESCRIPTOR));
NewGdtSize -= ((UINT8 *)EssData.Ia32.GdtTable - GdtBuffer);
EssData.Ia32.GdtTableSize = NewGdtSize;
EssData.Ia32.ExceptionTssDesc = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize);
EssData.Ia32.ExceptionTss = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize +
EssData.Ia32.ExceptionTssDescSize);
EssData.Ia32.ExceptionTss = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize +
EssData.Ia32.ExceptionTssDescSize);
EssData.Ia32.KnownGoodStackTop = (UINTN)StackTop;
DEBUG ((DEBUG_INFO,
"Exception stack top[cpu%lu]: 0x%lX\n",
(UINT64)(UINTN)Index,
(UINT64)(UINTN)StackTop));
DEBUG ((
DEBUG_INFO,
"Exception stack top[cpu%lu]: 0x%lX\n",
(UINT64)(UINTN)Index,
(UINT64)(UINTN)StackTop
));
if (Index == Bsp) {
InitializeExceptionStackSwitchHandlers (&EssData);
@@ -776,7 +779,7 @@ InitializeMpExceptionStackSwitchHandlers (
);
}
StackTop -= NewStackSize;
StackTop -= NewStackSize;
}
}
@@ -815,9 +818,9 @@ InitializeMpSupport (
VOID
)
{
EFI_STATUS Status;
UINTN NumberOfProcessors;
UINTN NumberOfEnabledProcessors;
EFI_STATUS Status;
UINTN NumberOfProcessors;
UINTN NumberOfEnabledProcessors;
//
// Wakeup APs to do initialization
@@ -841,9 +844,9 @@ InitializeMpSupport (
Status = gBS->InstallMultipleProtocolInterfaces (
&mMpServiceHandle,
&gEfiMpServiceProtocolGuid, &mMpServicesTemplate,
&gEfiMpServiceProtocolGuid,
&mMpServicesTemplate,
NULL
);
ASSERT_EFI_ERROR (Status);
}

1
UefiCpuPkg/CpuDxe/CpuMp.h
View File

@@ -467,4 +467,3 @@ WhoAmI (
);
#endif // _CPU_MP_H_

559
UefiCpuPkg/CpuDxe/CpuPageTable.c
View File

File diff suppressed because it is too large Load Diff

45
UefiCpuPkg/CpuDxe/CpuPageTable.h
View File

@@ -19,19 +19,19 @@
#define PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED BIT31
// Other bits are reserved for future use
typedef struct {
UINT32 PageTableBase;
UINT32 Reserved;
UINT32 Attributes;
UINT32 PageTableBase;
UINT32 Reserved;
UINT32 Attributes;
} PAGE_TABLE_LIB_PAGING_CONTEXT_IA32;
typedef struct {
UINT64 PageTableBase;
UINT32 Attributes;
UINT64 PageTableBase;
UINT32 Attributes;
} PAGE_TABLE_LIB_PAGING_CONTEXT_X64;
typedef union {
PAGE_TABLE_LIB_PAGING_CONTEXT_IA32 Ia32;
PAGE_TABLE_LIB_PAGING_CONTEXT_X64 X64;
PAGE_TABLE_LIB_PAGING_CONTEXT_IA32 Ia32;
PAGE_TABLE_LIB_PAGING_CONTEXT_X64 X64;
} PAGE_TABLE_LIB_PAGING_CONTEXT_DATA;
typedef struct {
@@ -41,8 +41,8 @@ typedef struct {
// #define IMAGE_FILE_MACHINE_I386 0x014c
// #define IMAGE_FILE_MACHINE_X64 0x8664
//
UINT16 MachineType;
PAGE_TABLE_LIB_PAGING_CONTEXT_DATA ContextData;
UINT16 MachineType;
PAGE_TABLE_LIB_PAGING_CONTEXT_DATA ContextData;
} PAGE_TABLE_LIB_PAGING_CONTEXT;
#define PAGE_TABLE_POOL_ALIGNMENT BASE_2MB
@@ -52,12 +52,11 @@ typedef struct {
(~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
typedef struct {
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
} PAGE_TABLE_POOL;
/**
Allocates one or more 4KB pages for page table.
@@ -68,7 +67,7 @@ typedef struct {
**/
typedef
VOID *
(EFIAPI *PAGE_TABLE_LIB_ALLOCATE_PAGES) (
(EFIAPI *PAGE_TABLE_LIB_ALLOCATE_PAGES)(
IN UINTN Pages
);
@@ -103,11 +102,11 @@ VOID *
RETURN_STATUS
EFIAPI
AssignMemoryPageAttributes (
IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
IN PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes,
IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL
IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
IN PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes,
IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL
);
/**
@@ -136,7 +135,7 @@ InitializePageTableLib (
VOID *
EFIAPI
AllocatePageTableMemory (
IN UINTN Pages
IN UINTN Pages
);
/**
@@ -149,9 +148,9 @@ AllocatePageTableMemory (
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
);
#endif

9
UefiCpuPkg/CpuDxe/Ia32/PagingAttribute.c
View File

@@ -8,7 +8,6 @@
#include "CpuPageTable.h"
/**
Get paging details.
@@ -19,16 +18,16 @@
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
)
{
if (PageTableBase != NULL) {
*PageTableBase = &PagingContextData->Ia32.PageTableBase;
}
if (Attributes != NULL) {
*Attributes = &PagingContextData->Ia32.Attributes;
}
}

9
UefiCpuPkg/CpuDxe/X64/PagingAttribute.c
View File

@@ -8,7 +8,6 @@
#include "CpuPageTable.h"
/**
Get paging details.
@@ -19,16 +18,16 @@
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
)
{
if (PageTableBase != NULL) {
*PageTableBase = &PagingContextData->X64.PageTableBase;
}
if (Attributes != NULL) {
*Attributes = &PagingContextData->X64.Attributes;
}
}