UefiCpuPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
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mergify[bot]
parent
91415a36ae
commit
053e878bfb
@@ -13,49 +13,49 @@ typedef struct {
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//
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// Package number.
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//
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UINT32 Package;
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UINT32 Package;
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//
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// Core type of logical processor.
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// Value = CPUID.1Ah:EAX[31:24]
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//
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UINT8 CoreType;
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UINT8 CoreType;
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//
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// Level of the cache that this package's this type of logical processor corresponds to.
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// Value = CPUID.04h:EAX[07:05]
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//
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UINT8 CacheLevel : 3;
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UINT8 CacheLevel : 3;
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//
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// Type of the cache that this package's this type of logical processor corresponds to.
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// Value = CPUID.04h:EAX[04:00]
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//
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UINT8 CacheType : 5;
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UINT8 CacheType : 5;
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//
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// Ways of associativity.
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// Value = CPUID.04h:EBX[31:22]
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//
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UINT16 CacheWays : 10;
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UINT16 CacheWays : 10;
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//
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// Fully associative cache.
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// Value = CPUID.04h:EAX[09]
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//
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UINT16 FullyAssociativeCache : 1;
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UINT16 FullyAssociativeCache : 1;
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//
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// Direct mapped cache.
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// Value = CPUID.04h:EDX[02]
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//
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UINT16 DirectMappedCache : 1;
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UINT16 Reserved : 4;
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UINT16 DirectMappedCache : 1;
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UINT16 Reserved : 4;
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//
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// Size of single cache that this package's this type of logical processor corresponds to.
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// Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) *
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// (CPUID.04h:EBX[11:00] + 1) * (CPUID.04h:ECX[31:00] + 1)
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//
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UINT32 CacheSizeinKB;
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UINT32 CacheSizeinKB;
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//
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// Number of the cache that this package's this type of logical processor corresponds to.
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// Have subtracted the number of caches that are shared.
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//
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UINT16 CacheCount;
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UINT16 CacheCount;
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} CPU_CACHE_INFO;
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/**
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@@ -78,8 +78,8 @@ typedef struct {
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EFI_STATUS
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EFIAPI
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GetCpuCacheInfo (
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IN OUT CPU_CACHE_INFO *CpuCacheInfo,
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IN OUT UINTN *CpuCacheInfoCount
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IN OUT CPU_CACHE_INFO *CpuCacheInfo,
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IN OUT UINTN *CpuCacheInfoCount
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);
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#endif
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@@ -38,7 +38,7 @@ GetLocalApicBaseAddress (
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VOID
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EFIAPI
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SetLocalApicBaseAddress (
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IN UINTN BaseAddress
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IN UINTN BaseAddress
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);
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/**
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@@ -120,8 +120,8 @@ GetApicVersion (
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VOID
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EFIAPI
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SendFixedIpi (
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IN UINT32 ApicId,
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IN UINT8 Vector
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IN UINT32 ApicId,
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IN UINT8 Vector
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);
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/**
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@@ -134,7 +134,7 @@ SendFixedIpi (
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VOID
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EFIAPI
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SendFixedIpiAllExcludingSelf (
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IN UINT8 Vector
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IN UINT8 Vector
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);
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/**
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@@ -147,7 +147,7 @@ SendFixedIpiAllExcludingSelf (
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VOID
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EFIAPI
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SendSmiIpi (
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IN UINT32 ApicId
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IN UINT32 ApicId
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);
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/**
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@@ -171,7 +171,7 @@ SendSmiIpiAllExcludingSelf (
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VOID
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EFIAPI
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SendInitIpi (
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IN UINT32 ApicId
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IN UINT32 ApicId
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);
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/**
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@@ -200,8 +200,8 @@ SendInitIpiAllExcludingSelf (
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VOID
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EFIAPI
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SendInitSipiSipi (
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IN UINT32 ApicId,
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IN UINT32 StartupRoutine
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IN UINT32 ApicId,
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IN UINT32 StartupRoutine
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);
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/**
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@@ -218,7 +218,7 @@ SendInitSipiSipi (
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VOID
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EFIAPI
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SendInitSipiSipiAllExcludingSelf (
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IN UINT32 StartupRoutine
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IN UINT32 StartupRoutine
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);
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/**
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@@ -296,10 +296,10 @@ GetApicTimerCurrentCount (
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VOID
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EFIAPI
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InitializeApicTimer (
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IN UINTN DivideValue,
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IN UINT32 InitCount,
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IN BOOLEAN PeriodicMode,
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IN UINT8 Vector
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IN UINTN DivideValue,
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IN UINT32 InitCount,
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IN BOOLEAN PeriodicMode,
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IN UINT8 Vector
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);
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/**
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@@ -453,5 +453,5 @@ GetProcessorLocation2ByApicId (
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OUT UINT32 *Core OPTIONAL,
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OUT UINT32 *Thread OPTIONAL
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);
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#endif
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#endif
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@@ -52,7 +52,7 @@ GetProcessorMicrocodeCpuId (
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UINT32
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EFIAPI
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GetMicrocodeLength (
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IN CPU_MICROCODE_HEADER *Microcode
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IN CPU_MICROCODE_HEADER *Microcode
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);
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/**
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@@ -65,7 +65,7 @@ GetMicrocodeLength (
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VOID
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EFIAPI
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LoadMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode
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IN CPU_MICROCODE_HEADER *Microcode
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);
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/**
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@@ -109,12 +109,12 @@ LoadMicrocode (
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BOOLEAN
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EFIAPI
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IsValidMicrocode (
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IN CPU_MICROCODE_HEADER *Microcode,
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IN UINTN MicrocodeLength,
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IN UINT32 MinimumRevision,
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IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuIds,
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IN UINTN MicrocodeCpuIdCount,
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IN BOOLEAN VerifyChecksum
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IN CPU_MICROCODE_HEADER *Microcode,
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IN UINTN MicrocodeLength,
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IN UINT32 MinimumRevision,
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IN EDKII_PEI_MICROCODE_CPU_ID *MicrocodeCpuIds,
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IN UINTN MicrocodeCpuIdCount,
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IN BOOLEAN VerifyChecksum
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);
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#endif
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@@ -54,8 +54,8 @@ MpInitLibInitialize (
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EFI_STATUS
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EFIAPI
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MpInitLibGetNumberOfProcessors (
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OUT UINTN *NumberOfProcessors OPTIONAL,
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OUT UINTN *NumberOfEnabledProcessors OPTIONAL
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OUT UINTN *NumberOfProcessors OPTIONAL,
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OUT UINTN *NumberOfEnabledProcessors OPTIONAL
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);
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/**
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@@ -161,12 +161,12 @@ MpInitLibGetProcessorInfo (
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EFI_STATUS
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EFIAPI
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MpInitLibStartupAllAPs (
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IN EFI_AP_PROCEDURE Procedure,
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IN BOOLEAN SingleThread,
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IN EFI_EVENT WaitEvent OPTIONAL,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL,
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OUT UINTN **FailedCpuList OPTIONAL
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IN EFI_AP_PROCEDURE Procedure,
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IN BOOLEAN SingleThread,
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IN EFI_EVENT WaitEvent OPTIONAL,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL,
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OUT UINTN **FailedCpuList OPTIONAL
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);
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/**
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@@ -243,12 +243,12 @@ MpInitLibStartupAllAPs (
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EFI_STATUS
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EFIAPI
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MpInitLibStartupThisAP (
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IN EFI_AP_PROCEDURE Procedure,
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IN UINTN ProcessorNumber,
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IN EFI_EVENT WaitEvent OPTIONAL,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL,
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OUT BOOLEAN *Finished OPTIONAL
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IN EFI_AP_PROCEDURE Procedure,
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IN UINTN ProcessorNumber,
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IN EFI_EVENT WaitEvent OPTIONAL,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL,
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OUT BOOLEAN *Finished OPTIONAL
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);
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/**
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@@ -280,8 +280,8 @@ MpInitLibStartupThisAP (
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EFI_STATUS
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EFIAPI
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MpInitLibSwitchBSP (
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IN UINTN ProcessorNumber,
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IN BOOLEAN EnableOldBSP
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IN UINTN ProcessorNumber,
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IN BOOLEAN EnableOldBSP
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);
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/**
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@@ -317,9 +317,9 @@ MpInitLibSwitchBSP (
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EFI_STATUS
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EFIAPI
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MpInitLibEnableDisableAP (
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IN UINTN ProcessorNumber,
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IN BOOLEAN EnableAP,
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IN UINT32 *HealthFlag OPTIONAL
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IN UINTN ProcessorNumber,
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IN BOOLEAN EnableAP,
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IN UINT32 *HealthFlag OPTIONAL
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);
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/**
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@@ -341,7 +341,7 @@ MpInitLibEnableDisableAP (
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EFI_STATUS
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EFIAPI
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MpInitLibWhoAmI (
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OUT UINTN *ProcessorNumber
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OUT UINTN *ProcessorNumber
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);
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/**
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@@ -373,9 +373,9 @@ MpInitLibWhoAmI (
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EFI_STATUS
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EFIAPI
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MpInitLibStartupAllCPUs (
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IN EFI_AP_PROCEDURE Procedure,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL
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IN EFI_AP_PROCEDURE Procedure,
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IN UINTN TimeoutInMicroseconds,
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IN VOID *ProcedureArgument OPTIONAL
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);
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#endif
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@@ -24,27 +24,27 @@
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//
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#define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2
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#define MTRR_NUMBER_OF_FIXED_MTRR 11
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#define MTRR_NUMBER_OF_FIXED_MTRR 11
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//
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// Structure to describe a fixed MTRR
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//
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typedef struct {
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UINT32 Msr;
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UINT32 BaseAddress;
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UINT32 Length;
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UINT32 Msr;
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UINT32 BaseAddress;
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UINT32 Length;
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} FIXED_MTRR;
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//
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// Structure to describe a variable MTRR
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//
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typedef struct {
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UINT64 BaseAddress;
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UINT64 Length;
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UINT64 Type;
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UINT32 Msr;
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BOOLEAN Valid;
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BOOLEAN Used;
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UINT64 BaseAddress;
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UINT64 Length;
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UINT64 Type;
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UINT32 Msr;
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BOOLEAN Valid;
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BOOLEAN Used;
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} VARIABLE_MTRR;
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//
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@@ -59,14 +59,14 @@ typedef struct _MTRR_VARIABLE_SETTING_ {
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// Array for variable MTRRs
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//
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typedef struct _MTRR_VARIABLE_SETTINGS_ {
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MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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} MTRR_VARIABLE_SETTINGS;
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//
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// Array for fixed MTRRs
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//
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typedef struct _MTRR_FIXED_SETTINGS_ {
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UINT64 Mtrr[MTRR_NUMBER_OF_FIXED_MTRR];
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UINT64 Mtrr[MTRR_NUMBER_OF_FIXED_MTRR];
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} MTRR_FIXED_SETTINGS;
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//
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@@ -98,9 +98,9 @@ typedef enum {
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#define MTRR_CACHE_INVALID_TYPE 7
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typedef struct {
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UINT64 BaseAddress;
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UINT64 Length;
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MTRR_MEMORY_CACHE_TYPE Type;
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UINT64 BaseAddress;
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UINT64 Length;
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MTRR_MEMORY_CACHE_TYPE Type;
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} MTRR_MEMORY_RANGE;
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/**
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@@ -168,7 +168,6 @@ MtrrSetMemoryAttribute (
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IN MTRR_MEMORY_CACHE_TYPE Attribute
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);
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/**
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This function will get the memory cache type of the specific address.
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This function is mainly for debugging purposes.
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@@ -181,10 +180,9 @@ MtrrSetMemoryAttribute (
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MTRR_MEMORY_CACHE_TYPE
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EFIAPI
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MtrrGetMemoryAttribute (
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IN PHYSICAL_ADDRESS Address
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IN PHYSICAL_ADDRESS Address
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);
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/**
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This function gets the content in fixed MTRRs
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@@ -193,13 +191,12 @@ MtrrGetMemoryAttribute (
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@return The pointer of FixedSettings
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**/
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MTRR_FIXED_SETTINGS*
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MTRR_FIXED_SETTINGS *
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EFIAPI
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MtrrGetFixedMtrr (
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OUT MTRR_FIXED_SETTINGS *FixedSettings
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OUT MTRR_FIXED_SETTINGS *FixedSettings
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);
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/**
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This function gets the content in all MTRRs (variable and fixed)
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@@ -211,10 +208,9 @@ MtrrGetFixedMtrr (
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MTRR_SETTINGS *
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EFIAPI
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MtrrGetAllMtrrs (
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OUT MTRR_SETTINGS *MtrrSetting
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OUT MTRR_SETTINGS *MtrrSetting
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);
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/**
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This function sets all MTRRs (variable and fixed)
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@@ -226,10 +222,9 @@ MtrrGetAllMtrrs (
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MTRR_SETTINGS *
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EFIAPI
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MtrrSetAllMtrrs (
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IN MTRR_SETTINGS *MtrrSetting
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IN MTRR_SETTINGS *MtrrSetting
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);
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/**
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Get the attribute of variable MTRRs.
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@@ -248,12 +243,11 @@ MtrrSetAllMtrrs (
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UINT32
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EFIAPI
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MtrrGetMemoryAttributeInVariableMtrr (
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidAddressMask,
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OUT VARIABLE_MTRR *VariableMtrr
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IN UINT64 MtrrValidBitsMask,
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IN UINT64 MtrrValidAddressMask,
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OUT VARIABLE_MTRR *VariableMtrr
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);
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/**
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This function prints all MTRRs for debugging.
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**/
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@@ -355,10 +349,11 @@ MtrrSetMemoryAttributeInMtrrSettings (
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RETURN_STATUS
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EFIAPI
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MtrrSetMemoryAttributesInMtrrSettings (
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IN OUT MTRR_SETTINGS *MtrrSetting,
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IN VOID *Scratch,
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IN OUT UINTN *ScratchSize,
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IN CONST MTRR_MEMORY_RANGE *Ranges,
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IN UINTN RangeCount
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IN OUT MTRR_SETTINGS *MtrrSetting,
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IN VOID *Scratch,
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IN OUT UINTN *ScratchSize,
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IN CONST MTRR_MEMORY_RANGE *Ranges,
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IN UINTN RangeCount
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);
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#endif // _MTRR_LIB_H_
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|
@@ -30,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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EFI_PEI_PPI_DESCRIPTOR *
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EFIAPI
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SecPlatformMain (
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IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
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IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData
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);
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/**
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@@ -47,9 +47,9 @@ SecPlatformMain (
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EFI_STATUS
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EFIAPI
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SecPlatformInformation (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
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);
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/**
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@@ -20,62 +20,62 @@
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/// modifiers of a CPU feature. When used in a list, the define value
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/// CPU_FEATURE_END is used to terminate a list of CPU feature values.
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/// @{
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#define CPU_FEATURE_AESNI 0
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#define CPU_FEATURE_TURBO_MODE 1
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#define CPU_FEATURE_MWAIT 2
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#define CPU_FEATURE_ACPI 3
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#define CPU_FEATURE_EIST 4
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#define CPU_FEATURE_RESERVED_5 5
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#define CPU_FEATURE_FASTSTRINGS 6
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#define CPU_FEATURE_VMX 7
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#define CPU_FEATURE_SMX 8
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#define CPU_FEATURE_LMCE 9
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#define CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER 10
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#define CPU_FEATURE_LIMIT_CPUID_MAX_VAL 11
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#define CPU_FEATURE_MCE 12
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#define CPU_FEATURE_MCA 13
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#define CPU_FEATURE_MCG_CTL 14
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#define CPU_FEATURE_PENDING_BREAK 15
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#define CPU_FEATURE_C1E 16
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#define CPU_FEATURE_C1_AUTO_DEMOTION 17
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#define CPU_FEATURE_C3_AUTO_DEMOTION 18
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#define CPU_FEATURE_C1_UNDEMOTION 19
|
||||
#define CPU_FEATURE_C3_UNDEMOTION 20
|
||||
#define CPU_FEATURE_C_STATE 21
|
||||
#define CPU_FEATURE_TM 22
|
||||
#define CPU_FEATURE_TM2 23
|
||||
#define CPU_FEATURE_X2APIC 24
|
||||
#define CPU_FEATURE_RESERVED_25 25
|
||||
#define CPU_FEATURE_RESERVED_26 26
|
||||
#define CPU_FEATURE_RESERVED_27 27
|
||||
#define CPU_FEATURE_RESERVED_28 28
|
||||
#define CPU_FEATURE_RESERVED_29 29
|
||||
#define CPU_FEATURE_RESERVED_30 30
|
||||
#define CPU_FEATURE_RESERVED_31 31
|
||||
#define CPU_FEATURE_AESNI 0
|
||||
#define CPU_FEATURE_TURBO_MODE 1
|
||||
#define CPU_FEATURE_MWAIT 2
|
||||
#define CPU_FEATURE_ACPI 3
|
||||
#define CPU_FEATURE_EIST 4
|
||||
#define CPU_FEATURE_RESERVED_5 5
|
||||
#define CPU_FEATURE_FASTSTRINGS 6
|
||||
#define CPU_FEATURE_VMX 7
|
||||
#define CPU_FEATURE_SMX 8
|
||||
#define CPU_FEATURE_LMCE 9
|
||||
#define CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER 10
|
||||
#define CPU_FEATURE_LIMIT_CPUID_MAX_VAL 11
|
||||
#define CPU_FEATURE_MCE 12
|
||||
#define CPU_FEATURE_MCA 13
|
||||
#define CPU_FEATURE_MCG_CTL 14
|
||||
#define CPU_FEATURE_PENDING_BREAK 15
|
||||
#define CPU_FEATURE_C1E 16
|
||||
#define CPU_FEATURE_C1_AUTO_DEMOTION 17
|
||||
#define CPU_FEATURE_C3_AUTO_DEMOTION 18
|
||||
#define CPU_FEATURE_C1_UNDEMOTION 19
|
||||
#define CPU_FEATURE_C3_UNDEMOTION 20
|
||||
#define CPU_FEATURE_C_STATE 21
|
||||
#define CPU_FEATURE_TM 22
|
||||
#define CPU_FEATURE_TM2 23
|
||||
#define CPU_FEATURE_X2APIC 24
|
||||
#define CPU_FEATURE_RESERVED_25 25
|
||||
#define CPU_FEATURE_RESERVED_26 26
|
||||
#define CPU_FEATURE_RESERVED_27 27
|
||||
#define CPU_FEATURE_RESERVED_28 28
|
||||
#define CPU_FEATURE_RESERVED_29 29
|
||||
#define CPU_FEATURE_RESERVED_30 30
|
||||
#define CPU_FEATURE_RESERVED_31 31
|
||||
|
||||
#define CPU_FEATURE_L2_PREFETCHER (32+0)
|
||||
#define CPU_FEATURE_L1_DATA_PREFETCHER (32+1)
|
||||
#define CPU_FEATURE_HARDWARE_PREFETCHER (32+2)
|
||||
#define CPU_FEATURE_ADJACENT_CACHE_LINE_PREFETCH (32+3)
|
||||
#define CPU_FEATURE_DCU_PREFETCHER (32+4)
|
||||
#define CPU_FEATURE_IP_PREFETCHER (32+5)
|
||||
#define CPU_FEATURE_MLC_STREAMER_PREFETCHER (32+6)
|
||||
#define CPU_FEATURE_MLC_SPATIAL_PREFETCHER (32+7)
|
||||
#define CPU_FEATURE_THREE_STRIKE_COUNTER (32+8)
|
||||
#define CPU_FEATURE_APIC_TPR_UPDATE_MESSAGE (32+9)
|
||||
#define CPU_FEATURE_ENERGY_PERFORMANCE_BIAS (32+10)
|
||||
#define CPU_FEATURE_PPIN (32+11)
|
||||
#define CPU_FEATURE_PROC_TRACE (32+12)
|
||||
#define CPU_FEATURE_L2_PREFETCHER (32+0)
|
||||
#define CPU_FEATURE_L1_DATA_PREFETCHER (32+1)
|
||||
#define CPU_FEATURE_HARDWARE_PREFETCHER (32+2)
|
||||
#define CPU_FEATURE_ADJACENT_CACHE_LINE_PREFETCH (32+3)
|
||||
#define CPU_FEATURE_DCU_PREFETCHER (32+4)
|
||||
#define CPU_FEATURE_IP_PREFETCHER (32+5)
|
||||
#define CPU_FEATURE_MLC_STREAMER_PREFETCHER (32+6)
|
||||
#define CPU_FEATURE_MLC_SPATIAL_PREFETCHER (32+7)
|
||||
#define CPU_FEATURE_THREE_STRIKE_COUNTER (32+8)
|
||||
#define CPU_FEATURE_APIC_TPR_UPDATE_MESSAGE (32+9)
|
||||
#define CPU_FEATURE_ENERGY_PERFORMANCE_BIAS (32+10)
|
||||
#define CPU_FEATURE_PPIN (32+11)
|
||||
#define CPU_FEATURE_PROC_TRACE (32+12)
|
||||
|
||||
#define CPU_FEATURE_BEFORE_ALL BIT23
|
||||
#define CPU_FEATURE_AFTER_ALL BIT24
|
||||
#define CPU_FEATURE_THREAD_BEFORE BIT25
|
||||
#define CPU_FEATURE_THREAD_AFTER BIT26
|
||||
#define CPU_FEATURE_CORE_BEFORE BIT27
|
||||
#define CPU_FEATURE_CORE_AFTER BIT28
|
||||
#define CPU_FEATURE_PACKAGE_BEFORE BIT29
|
||||
#define CPU_FEATURE_PACKAGE_AFTER BIT30
|
||||
#define CPU_FEATURE_END MAX_UINT32
|
||||
#define CPU_FEATURE_BEFORE_ALL BIT23
|
||||
#define CPU_FEATURE_AFTER_ALL BIT24
|
||||
#define CPU_FEATURE_THREAD_BEFORE BIT25
|
||||
#define CPU_FEATURE_THREAD_AFTER BIT26
|
||||
#define CPU_FEATURE_CORE_BEFORE BIT27
|
||||
#define CPU_FEATURE_CORE_AFTER BIT28
|
||||
#define CPU_FEATURE_PACKAGE_BEFORE BIT29
|
||||
#define CPU_FEATURE_PACKAGE_AFTER BIT30
|
||||
#define CPU_FEATURE_END MAX_UINT32
|
||||
/// @}
|
||||
|
||||
///
|
||||
@@ -85,28 +85,28 @@ typedef struct {
|
||||
//
|
||||
// Set to 1 when current processor is the first thread in the core it resides in.
|
||||
//
|
||||
UINT32 Thread : 1;
|
||||
UINT32 Thread : 1;
|
||||
//
|
||||
// Set to 1 when current processor is a thread of the first core in the module it resides in.
|
||||
//
|
||||
UINT32 Core : 1;
|
||||
UINT32 Core : 1;
|
||||
//
|
||||
// Set to 1 when current processor is a thread of the first module in the tile it resides in.
|
||||
//
|
||||
UINT32 Module : 1;
|
||||
UINT32 Module : 1;
|
||||
//
|
||||
// Set to 1 when current processor is a thread of the first tile in the die it resides in.
|
||||
//
|
||||
UINT32 Tile : 1;
|
||||
UINT32 Tile : 1;
|
||||
//
|
||||
// Set to 1 when current processor is a thread of the first die in the package it resides in.
|
||||
//
|
||||
UINT32 Die : 1;
|
||||
UINT32 Die : 1;
|
||||
//
|
||||
// Set to 1 when current processor is a thread of the first package in the system.
|
||||
//
|
||||
UINT32 Package : 1;
|
||||
UINT32 Reserved : 26;
|
||||
UINT32 Package : 1;
|
||||
UINT32 Reserved : 26;
|
||||
} REGISTER_CPU_FEATURE_FIRST_PROCESSOR;
|
||||
|
||||
///
|
||||
@@ -118,36 +118,36 @@ typedef struct {
|
||||
///
|
||||
/// The package that the CPU resides
|
||||
///
|
||||
EFI_PROCESSOR_INFORMATION ProcessorInfo;
|
||||
EFI_PROCESSOR_INFORMATION ProcessorInfo;
|
||||
|
||||
///
|
||||
/// The bit flag indicating whether the CPU is the first Thread/Core/Module/Tile/Die/Package in its parent scope.
|
||||
///
|
||||
REGISTER_CPU_FEATURE_FIRST_PROCESSOR First;
|
||||
REGISTER_CPU_FEATURE_FIRST_PROCESSOR First;
|
||||
///
|
||||
/// The Display Family of the CPU computed from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
UINT32 DisplayFamily;
|
||||
UINT32 DisplayFamily;
|
||||
///
|
||||
/// The Display Model of the CPU computed from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
UINT32 DisplayModel;
|
||||
UINT32 DisplayModel;
|
||||
///
|
||||
/// The Stepping ID of the CPU computed from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
UINT32 SteppingId;
|
||||
UINT32 SteppingId;
|
||||
///
|
||||
/// The Processor Type of the CPU computed from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
UINT32 ProcessorType;
|
||||
UINT32 ProcessorType;
|
||||
///
|
||||
/// Bit field structured returned in ECX from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
CPUID_VERSION_INFO_ECX CpuIdVersionInfoEcx;
|
||||
CPUID_VERSION_INFO_ECX CpuIdVersionInfoEcx;
|
||||
///
|
||||
/// Bit field structured returned in EDX from CPUID leaf CPUID_VERSION_INFO
|
||||
///
|
||||
CPUID_VERSION_INFO_EDX CpuIdVersionInfoEdx;
|
||||
CPUID_VERSION_INFO_EDX CpuIdVersionInfoEdx;
|
||||
} REGISTER_CPU_FEATURE_INFORMATION;
|
||||
|
||||
/**
|
||||
@@ -167,7 +167,7 @@ typedef struct {
|
||||
BOOLEAN
|
||||
EFIAPI
|
||||
IsCpuFeatureSupported (
|
||||
IN UINT32 Feature
|
||||
IN UINT32 Feature
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -184,7 +184,7 @@ IsCpuFeatureSupported (
|
||||
BOOLEAN
|
||||
EFIAPI
|
||||
IsCpuFeatureInSetting (
|
||||
IN UINT32 Feature
|
||||
IN UINT32 Feature
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -303,10 +303,10 @@ RETURN_STATUS
|
||||
RETURN_STATUS
|
||||
EFIAPI
|
||||
RegisterCpuFeature (
|
||||
IN CHAR8 *FeatureName OPTIONAL,
|
||||
IN CPU_FEATURE_GET_CONFIG_DATA GetConfigDataFunc OPTIONAL,
|
||||
IN CPU_FEATURE_SUPPORT SupportFunc OPTIONAL,
|
||||
IN CPU_FEATURE_INITIALIZE InitializeFunc OPTIONAL,
|
||||
IN CHAR8 *FeatureName OPTIONAL,
|
||||
IN CPU_FEATURE_GET_CONFIG_DATA GetConfigDataFunc OPTIONAL,
|
||||
IN CPU_FEATURE_SUPPORT SupportFunc OPTIONAL,
|
||||
IN CPU_FEATURE_INITIALIZE InitializeFunc OPTIONAL,
|
||||
...
|
||||
);
|
||||
|
||||
@@ -348,7 +348,7 @@ CpuFeaturesInitialize (
|
||||
VOID
|
||||
EFIAPI
|
||||
SwitchBspAfterFeaturesInitialize (
|
||||
IN UINTN ProcessorNumber
|
||||
IN UINTN ProcessorNumber
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -368,11 +368,11 @@ SwitchBspAfterFeaturesInitialize (
|
||||
VOID
|
||||
EFIAPI
|
||||
CpuRegisterTableWrite (
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -394,11 +394,11 @@ CpuRegisterTableWrite (
|
||||
VOID
|
||||
EFIAPI
|
||||
CpuRegisterTableTestThenWrite (
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -418,11 +418,11 @@ CpuRegisterTableTestThenWrite (
|
||||
VOID
|
||||
EFIAPI
|
||||
PreSmmCpuRegisterTableWrite (
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
IN UINTN ProcessorNumber,
|
||||
IN REGISTER_TYPE RegisterType,
|
||||
IN UINT64 Index,
|
||||
IN UINT64 ValueMask,
|
||||
IN UINT64 Value
|
||||
);
|
||||
|
||||
/**
|
||||
|
@@ -408,7 +408,7 @@ SmmCpuFeaturesCompleteSmmReadyToLock (
|
||||
VOID *
|
||||
EFIAPI
|
||||
SmmCpuFeaturesAllocatePageTableMemory (
|
||||
IN UINTN Pages
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
#endif
|
||||
|
@@ -13,10 +13,10 @@
|
||||
/// SMM Page Size Type
|
||||
///
|
||||
typedef enum {
|
||||
SmmPageSize4K,
|
||||
SmmPageSize2M,
|
||||
SmmPageSize1G,
|
||||
MaxSmmPageSizeType
|
||||
SmmPageSize4K,
|
||||
SmmPageSize2M,
|
||||
SmmPageSize1G,
|
||||
MaxSmmPageSizeType
|
||||
} SMM_PAGE_SIZE_TYPE;
|
||||
|
||||
/**
|
||||
@@ -74,7 +74,7 @@ ClearTopLevelSmiStatus (
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
PlatformSmmBspElection (
|
||||
OUT BOOLEAN *IsBsp
|
||||
OUT BOOLEAN *IsBsp
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -94,10 +94,10 @@ PlatformSmmBspElection (
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GetPlatformPageTableAttribute (
|
||||
IN UINT64 Address,
|
||||
OUT SMM_PAGE_SIZE_TYPE *PageSize,
|
||||
OUT UINTN *NumOfPages,
|
||||
OUT UINTN *PageAttribute
|
||||
IN UINT64 Address,
|
||||
OUT SMM_PAGE_SIZE_TYPE *PageSize,
|
||||
OUT UINTN *NumOfPages,
|
||||
OUT UINTN *PageAttribute
|
||||
);
|
||||
|
||||
#endif
|
||||
|
@@ -13,8 +13,6 @@
|
||||
#ifndef __UEFI_CPU_LIB_H__
|
||||
#define __UEFI_CPU_LIB_H__
|
||||
|
||||
|
||||
|
||||
/**
|
||||
Initializes floating point units for requirement of UEFI specification.
|
||||
|
||||
|
@@ -15,7 +15,6 @@
|
||||
#include <Protocol/DebugSupport.h>
|
||||
#include <Register/Amd/Ghcb.h>
|
||||
|
||||
|
||||
/**
|
||||
Perform VMGEXIT.
|
||||
|
||||
@@ -38,10 +37,10 @@
|
||||
UINT64
|
||||
EFIAPI
|
||||
VmgExit (
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN UINT64 ExitCode,
|
||||
IN UINT64 ExitInfo1,
|
||||
IN UINT64 ExitInfo2
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN UINT64 ExitCode,
|
||||
IN UINT64 ExitInfo1,
|
||||
IN UINT64 ExitInfo2
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -58,8 +57,8 @@ VmgExit (
|
||||
VOID
|
||||
EFIAPI
|
||||
VmgInit (
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN OUT BOOLEAN *InterruptState
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN OUT BOOLEAN *InterruptState
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -76,8 +75,8 @@ VmgInit (
|
||||
VOID
|
||||
EFIAPI
|
||||
VmgDone (
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN BOOLEAN InterruptState
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN BOOLEAN InterruptState
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -93,8 +92,8 @@ VmgDone (
|
||||
VOID
|
||||
EFIAPI
|
||||
VmgSetOffsetValid (
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN GHCB_REGISTER Offset
|
||||
IN OUT GHCB *Ghcb,
|
||||
IN GHCB_REGISTER Offset
|
||||
);
|
||||
|
||||
/**
|
||||
@@ -113,8 +112,8 @@ VmgSetOffsetValid (
|
||||
BOOLEAN
|
||||
EFIAPI
|
||||
VmgIsOffsetValid (
|
||||
IN GHCB *Ghcb,
|
||||
IN GHCB_REGISTER Offset
|
||||
IN GHCB *Ghcb,
|
||||
IN GHCB_REGISTER Offset
|
||||
);
|
||||
|
||||
/**
|
||||
|
Reference in New Issue
Block a user