UefiCpuPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -13,7 +13,9 @@
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#include <Library/DebugLib.h>
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#include <Register/Cpuid.h>
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GUID mCpuCrystalFrequencyHobGuid = { 0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a } };
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GUID mCpuCrystalFrequencyHobGuid = {
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0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a }
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};
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/**
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Internal function to retrieves the 64-bit frequency in Hz.
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@@ -41,11 +43,11 @@ CpuidCoreClockCalculateTscFrequency (
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VOID
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)
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{
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UINT64 TscFrequency;
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UINT64 CoreXtalFrequency;
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT64 TscFrequency;
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UINT64 CoreXtalFrequency;
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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//
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// Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Information
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@@ -57,11 +59,12 @@ CpuidCoreClockCalculateTscFrequency (
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//
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// If EAX or EBX returns 0, the XTAL ratio is not enumerated.
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//
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if (RegEax == 0 || RegEbx ==0 ) {
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if ((RegEax == 0) || (RegEbx == 0)) {
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ASSERT (RegEax != 0);
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ASSERT (RegEbx != 0);
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return 0;
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}
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//
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// If ECX returns 0, the XTAL frequency is not enumerated.
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// And PcdCpuCoreCrystalClockFrequency defined should base on processor series.
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@@ -69,7 +72,7 @@ CpuidCoreClockCalculateTscFrequency (
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if (RegEcx == 0) {
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CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
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} else {
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CoreXtalFrequency = (UINT64) RegEcx;
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CoreXtalFrequency = (UINT64)RegEcx;
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}
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//
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@@ -99,7 +102,7 @@ InternalCpuDelay (
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//
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// The target timer count is calculated here
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//
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Ticks = AsmReadTsc() + Delay;
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Ticks = AsmReadTsc () + Delay;
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//
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// Wait until time out
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@@ -107,8 +110,8 @@ InternalCpuDelay (
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// Thus, this function must be called within 10 years of reset since
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// Intel guarantees a minimum of 10 years before the TSC wraps.
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//
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while (AsmReadTsc() <= Ticks) {
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CpuPause();
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while (AsmReadTsc () <= Ticks) {
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CpuPause ();
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}
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}
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@@ -128,7 +131,6 @@ MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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InternalCpuDelay (
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DivU64x32 (
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MultU64x64 (
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@@ -136,8 +138,8 @@ MicroSecondDelay (
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InternalGetPerformanceCounterFrequency ()
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),
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1000000u
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)
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);
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)
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);
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return MicroSeconds;
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}
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@@ -158,7 +160,6 @@ NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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InternalCpuDelay (
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DivU64x32 (
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MultU64x64 (
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@@ -166,8 +167,8 @@ NanoSecondDelay (
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InternalGetPerformanceCounterFrequency ()
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),
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1000000000u
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)
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);
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)
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);
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return NanoSeconds;
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}
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@@ -230,6 +231,7 @@ GetPerformanceCounterProperties (
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if (EndValue != NULL) {
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*EndValue = 0xffffffffffffffffULL;
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}
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return InternalGetPerformanceCounterFrequency ();
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}
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@@ -269,9 +271,9 @@ GetTimeInNanoSecond (
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// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
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// i.e. highest bit set in Remainder should <= 33.
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//
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Shift = MAX (0, HighBitSet64 (Remainder) - 33);
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Remainder = RShiftU64 (Remainder, (UINTN) Shift);
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Frequency = RShiftU64 (Frequency, (UINTN) Shift);
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Shift = MAX (0, HighBitSet64 (Remainder) - 33);
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Remainder = RShiftU64 (Remainder, (UINTN)Shift);
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Frequency = RShiftU64 (Frequency, (UINTN)Shift);
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NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
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return NanoSeconds;
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