UefiCpuPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -34,8 +34,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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// MSRs required for configuration of SMM Code Access Check
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//
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#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
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#define SMM_CODE_ACCESS_CHK_BIT BIT58
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#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
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#define SMM_CODE_ACCESS_CHK_BIT BIT58
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//
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// Set default value to assume SMRR is not supported
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@@ -86,7 +86,7 @@ CpuFeaturesLibInitialization (
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AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
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FamilyId = (RegEax >> 8) & 0xf;
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ModelId = (RegEax >> 4) & 0xf;
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if (FamilyId == 0x06 || FamilyId == 0x0f) {
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if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
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ModelId = ModelId | ((RegEax >> 12) & 0xf0);
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}
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@@ -110,7 +110,7 @@ CpuFeaturesLibInitialization (
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// SMRR Physical Base and SMM Physical Mask MSRs are not available.
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//
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if (FamilyId == 0x06) {
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if (ModelId == 0x1C || ModelId == 0x26 || ModelId == 0x27 || ModelId == 0x35 || ModelId == 0x36) {
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if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) || (ModelId == 0x35) || (ModelId == 0x36)) {
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mSmrrSupported = FALSE;
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}
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}
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@@ -123,7 +123,7 @@ CpuFeaturesLibInitialization (
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// Processor Family MSRs
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//
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if (FamilyId == 0x06) {
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if (ModelId == 0x17 || ModelId == 0x0f) {
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if ((ModelId == 0x17) || (ModelId == 0x0f)) {
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mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE;
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mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK;
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}
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@@ -204,7 +204,7 @@ SmmCpuFeaturesInitializeProcessor (
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//
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// Configure SMBASE.
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//
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
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//
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@@ -216,7 +216,7 @@ SmmCpuFeaturesInitializeProcessor (
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// accessing SMRR base/mask MSRs. If Lock(BIT0) of MSR_FEATURE_CONTROL MSR(0x3A)
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// is set, then the MSR is locked and can not be modified.
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//
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if (mSmrrSupported && mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE) {
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if (mSmrrSupported && (mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE)) {
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FeatureControl = AsmReadMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL);
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if ((FeatureControl & BIT3) == 0) {
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if ((FeatureControl & BIT0) == 0) {
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@@ -242,7 +242,8 @@ SmmCpuFeaturesInitializeProcessor (
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//
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if ((CpuHotPlugData->SmrrSize < SIZE_4KB) ||
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(CpuHotPlugData->SmrrSize != GetPowerOfTwo32 (CpuHotPlugData->SmrrSize)) ||
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((CpuHotPlugData->SmrrBase & ~(CpuHotPlugData->SmrrSize - 1)) != CpuHotPlugData->SmrrBase)) {
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((CpuHotPlugData->SmrrBase & ~(CpuHotPlugData->SmrrSize - 1)) != CpuHotPlugData->SmrrBase))
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{
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//
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// Print message and halt if CPU is Monarch
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//
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@@ -263,7 +264,7 @@ SmmCpuFeaturesInitializeProcessor (
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AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
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FamilyId = (RegEax >> 8) & 0xf;
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ModelId = (RegEax >> 4) & 0xf;
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if (FamilyId == 0x06 || FamilyId == 0x0f) {
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if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
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ModelId = ModelId | ((RegEax >> 12) & 0xf0);
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}
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@@ -276,10 +277,11 @@ SmmCpuFeaturesInitializeProcessor (
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// Intel(R) Core(TM) Processor Family MSRs.
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//
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if (FamilyId == 0x06) {
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if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 ||
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ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || ModelId == 0x4F ||
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ModelId == 0x3F || ModelId == 0x56 || ModelId == 0x57 || ModelId == 0x5C ||
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ModelId == 0x8C) {
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if ((ModelId == 0x3C) || (ModelId == 0x45) || (ModelId == 0x46) ||
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(ModelId == 0x3D) || (ModelId == 0x47) || (ModelId == 0x4E) || (ModelId == 0x4F) ||
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(ModelId == 0x3F) || (ModelId == 0x56) || (ModelId == 0x57) || (ModelId == 0x5C) ||
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(ModelId == 0x8C))
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{
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//
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// Check to see if the CPU supports the SMM Code Access Check feature
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// Do not access this MSR unless the CPU supports the SmmRegFeatureControl
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@@ -382,7 +384,7 @@ SmmCpuFeaturesDisableSmrr (
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)
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{
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if (mSmrrSupported && mNeedConfigureMtrrs) {
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
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}
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}
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@@ -397,7 +399,7 @@ SmmCpuFeaturesReenableSmrr (
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)
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{
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if (mSmrrSupported && mNeedConfigureMtrrs) {
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
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}
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}
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@@ -458,9 +460,10 @@ SmmCpuFeaturesIsSmmRegisterSupported (
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IN SMM_REG_NAME RegName
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)
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{
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if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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return TRUE;
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}
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return FALSE;
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}
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@@ -483,9 +486,10 @@ SmmCpuFeaturesGetSmmRegister (
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IN SMM_REG_NAME RegName
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)
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{
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if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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return AsmReadMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL);
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}
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return 0;
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}
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@@ -508,7 +512,7 @@ SmmCpuFeaturesSetSmmRegister (
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IN UINT64 Value
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)
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{
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if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
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if (mSmmFeatureControlSupported && (RegName == SmmRegFeatureControl)) {
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AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);
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}
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}
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@@ -605,9 +609,8 @@ SmmCpuFeaturesCompleteSmmReadyToLock (
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VOID *
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EFIAPI
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SmmCpuFeaturesAllocatePageTableMemory (
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IN UINTN Pages
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IN UINTN Pages
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)
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{
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return NULL;
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}
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