UefiCpuPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki
committed by
mergify[bot]
mergify[bot]
parent
91415a36ae
commit
053e878bfb
@@ -21,7 +21,9 @@ SMM_CPU_PRIVATE_DATA mSmmCpuPrivateData = {
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NULL, // Pointer to Operation array
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NULL, // Pointer to CpuSaveStateSize array
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NULL, // Pointer to CpuSaveState array
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{ {0} }, // SmmReservedSmramRegion
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{
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{ 0 }
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}, // SmmReservedSmramRegion
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{
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SmmStartupThisAp, // SmmCoreEntryContext.SmmStartupThisAp
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0, // SmmCoreEntryContext.CurrentlyExecutingCpu
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@@ -35,10 +37,10 @@ SMM_CPU_PRIVATE_DATA mSmmCpuPrivateData = {
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RegisterSmmEntry // SmmConfiguration.RegisterSmmEntry
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},
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NULL, // pointer to Ap Wrapper Func array
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{NULL, NULL}, // List_Entry for Tokens.
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{ NULL, NULL }, // List_Entry for Tokens.
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};
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CPU_HOT_PLUG_DATA mCpuHotPlugData = {
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CPU_HOT_PLUG_DATA mCpuHotPlugData = {
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CPU_HOT_PLUG_DATA_REVISION_1, // Revision
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0, // Array Length of SmBase and APIC ID
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NULL, // Pointer to APIC ID array
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@@ -67,7 +69,7 @@ EFI_HANDLE mSmmCpuHandle = NULL;
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///
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/// SMM CPU Protocol instance
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///
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EFI_SMM_CPU_PROTOCOL mSmmCpu = {
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EFI_SMM_CPU_PROTOCOL mSmmCpu = {
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SmmReadSaveState,
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SmmWriteSaveState
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};
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@@ -75,60 +77,60 @@ EFI_SMM_CPU_PROTOCOL mSmmCpu = {
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///
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/// SMM Memory Attribute Protocol instance
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///
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EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL mSmmMemoryAttribute = {
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EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL mSmmMemoryAttribute = {
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EdkiiSmmGetMemoryAttributes,
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EdkiiSmmSetMemoryAttributes,
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EdkiiSmmClearMemoryAttributes
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};
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EFI_CPU_INTERRUPT_HANDLER mExternalVectorTable[EXCEPTION_VECTOR_NUMBER];
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EFI_CPU_INTERRUPT_HANDLER mExternalVectorTable[EXCEPTION_VECTOR_NUMBER];
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//
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// SMM stack information
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//
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UINTN mSmmStackArrayBase;
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UINTN mSmmStackArrayEnd;
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UINTN mSmmStackSize;
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UINTN mSmmStackArrayBase;
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UINTN mSmmStackArrayEnd;
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UINTN mSmmStackSize;
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UINTN mSmmShadowStackSize;
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BOOLEAN mCetSupported = TRUE;
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UINTN mSmmShadowStackSize;
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BOOLEAN mCetSupported = TRUE;
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UINTN mMaxNumberOfCpus = 1;
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UINTN mNumberOfCpus = 1;
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UINTN mMaxNumberOfCpus = 1;
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UINTN mNumberOfCpus = 1;
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//
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// SMM ready to lock flag
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//
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BOOLEAN mSmmReadyToLock = FALSE;
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BOOLEAN mSmmReadyToLock = FALSE;
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//
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// Global used to cache PCD for SMM Code Access Check enable
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//
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BOOLEAN mSmmCodeAccessCheckEnable = FALSE;
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BOOLEAN mSmmCodeAccessCheckEnable = FALSE;
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//
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// Global copy of the PcdPteMemoryEncryptionAddressOrMask
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//
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UINT64 mAddressEncMask = 0;
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UINT64 mAddressEncMask = 0;
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//
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// Spin lock used to serialize setting of SMM Code Access Check feature
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//
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SPIN_LOCK *mConfigSmmCodeAccessCheckLock = NULL;
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SPIN_LOCK *mConfigSmmCodeAccessCheckLock = NULL;
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//
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// Saved SMM ranges information
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//
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EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
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UINTN mSmmCpuSmramRangeCount;
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EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
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UINTN mSmmCpuSmramRangeCount;
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UINT8 mPhysicalAddressBits;
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UINT8 mPhysicalAddressBits;
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//
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// Control register contents saved for SMM S3 resume state initialization.
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//
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UINT32 mSmmCr0;
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UINT32 mSmmCr4;
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UINT32 mSmmCr0;
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UINT32 mSmmCr4;
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/**
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Initialize IDT to setup exception handlers for SMM.
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@@ -139,19 +141,19 @@ InitializeSmmIdt (
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VOID
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)
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{
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EFI_STATUS Status;
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BOOLEAN InterruptState;
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IA32_DESCRIPTOR DxeIdtr;
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EFI_STATUS Status;
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BOOLEAN InterruptState;
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IA32_DESCRIPTOR DxeIdtr;
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//
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// There are 32 (not 255) entries in it since only processor
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// generated exceptions will be handled.
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//
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gcSmiIdtr.Limit = (sizeof(IA32_IDT_GATE_DESCRIPTOR) * 32) - 1;
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gcSmiIdtr.Limit = (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 32) - 1;
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//
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// Allocate page aligned IDT, because it might be set as read only.
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//
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gcSmiIdtr.Base = (UINTN)AllocateCodePages (EFI_SIZE_TO_PAGES(gcSmiIdtr.Limit + 1));
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gcSmiIdtr.Base = (UINTN)AllocateCodePages (EFI_SIZE_TO_PAGES (gcSmiIdtr.Limit + 1));
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ASSERT (gcSmiIdtr.Base != 0);
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ZeroMem ((VOID *)gcSmiIdtr.Base, gcSmiIdtr.Limit + 1);
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@@ -173,7 +175,7 @@ InitializeSmmIdt (
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//
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// Restore DXE IDT table and CPU interrupt
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//
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AsmWriteIdtr ((IA32_DESCRIPTOR *) &DxeIdtr);
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AsmWriteIdtr ((IA32_DESCRIPTOR *)&DxeIdtr);
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SetInterruptState (InterruptState);
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}
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@@ -185,19 +187,19 @@ InitializeSmmIdt (
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**/
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VOID
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DumpModuleInfoByIp (
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IN UINTN CallerIpAddress
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IN UINTN CallerIpAddress
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)
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{
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UINTN Pe32Data;
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VOID *PdbPointer;
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UINTN Pe32Data;
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VOID *PdbPointer;
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//
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// Find Image Base
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//
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Pe32Data = PeCoffSearchImageBase (CallerIpAddress);
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if (Pe32Data != 0) {
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DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%p)", (VOID *) CallerIpAddress));
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PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);
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DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%p)", (VOID *)CallerIpAddress));
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PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *)Pe32Data);
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if (PdbPointer != NULL) {
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DEBUG ((DEBUG_ERROR, " in module (%a)\n", PdbPointer));
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}
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@@ -221,11 +223,11 @@ DumpModuleInfoByIp (
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EFI_STATUS
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EFIAPI
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SmmReadSaveState (
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IN CONST EFI_SMM_CPU_PROTOCOL *This,
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IN UINTN Width,
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IN EFI_SMM_SAVE_STATE_REGISTER Register,
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IN UINTN CpuIndex,
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OUT VOID *Buffer
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IN CONST EFI_SMM_CPU_PROTOCOL *This,
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IN UINTN Width,
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IN EFI_SMM_SAVE_STATE_REGISTER Register,
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IN UINTN CpuIndex,
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OUT VOID *Buffer
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)
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{
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EFI_STATUS Status;
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@@ -236,6 +238,7 @@ SmmReadSaveState (
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if ((CpuIndex >= gSmst->NumberOfCpus) || (Buffer == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// The SpeculationBarrier() call here is to ensure the above check for the
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// CpuIndex has been completed before the execution of subsequent codes.
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@@ -252,6 +255,7 @@ SmmReadSaveState (
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if (Width != sizeof (UINT64)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// If the processor is in SMM at the time the SMI occurred,
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// the pseudo register value for EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID is returned in Buffer.
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@@ -273,6 +277,7 @@ SmmReadSaveState (
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if (Status == EFI_UNSUPPORTED) {
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Status = ReadSaveStateRegister (CpuIndex, Register, Width, Buffer);
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}
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return Status;
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}
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@@ -293,11 +298,11 @@ SmmReadSaveState (
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EFI_STATUS
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EFIAPI
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SmmWriteSaveState (
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IN CONST EFI_SMM_CPU_PROTOCOL *This,
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IN UINTN Width,
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IN EFI_SMM_SAVE_STATE_REGISTER Register,
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IN UINTN CpuIndex,
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IN CONST VOID *Buffer
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IN CONST EFI_SMM_CPU_PROTOCOL *This,
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IN UINTN Width,
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IN EFI_SMM_SAVE_STATE_REGISTER Register,
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IN UINTN CpuIndex,
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IN CONST VOID *Buffer
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)
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{
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EFI_STATUS Status;
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@@ -324,10 +329,10 @@ SmmWriteSaveState (
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if (Status == EFI_UNSUPPORTED) {
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Status = WriteSaveStateRegister (CpuIndex, Register, Width, Buffer);
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}
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return Status;
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}
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/**
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C function for SMI handler. To change all processor's SMMBase Register.
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@@ -338,8 +343,8 @@ SmmInitHandler (
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VOID
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)
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{
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UINT32 ApicId;
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UINTN Index;
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UINT32 ApicId;
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UINTN Index;
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//
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// Update SMM IDT entries' code segment and load IDT
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@@ -384,6 +389,7 @@ SmmInitHandler (
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return;
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}
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}
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ASSERT (FALSE);
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}
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@@ -427,7 +433,7 @@ SmmRelocateBases (
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gcSmiInitGdtr.Base = gcSmiGdtr.Base;
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gcSmiInitGdtr.Limit = gcSmiGdtr.Limit;
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U8Ptr = (UINT8*)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET);
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U8Ptr = (UINT8 *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET);
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CpuStatePtr = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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//
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@@ -459,7 +465,8 @@ SmmRelocateBases (
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//
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// Wait for this AP to finish its 1st SMI
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//
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while (!mRebased[Index]);
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while (!mRebased[Index]) {
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}
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} else {
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//
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// BSP will be Relocated later
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@@ -477,7 +484,8 @@ SmmRelocateBases (
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//
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// Wait for the BSP to finish its 1st SMI
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//
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while (!mRebased[BspIndex]);
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while (!mRebased[BspIndex]) {
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}
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//
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// Restore contents at address 0x38000
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@@ -537,24 +545,24 @@ PiCpuSmmEntry (
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_MP_SERVICES_PROTOCOL *MpServices;
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UINTN NumberOfEnabledProcessors;
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UINTN Index;
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VOID *Buffer;
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UINTN BufferPages;
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UINTN TileCodeSize;
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UINTN TileDataSize;
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UINTN TileSize;
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UINT8 *Stacks;
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VOID *Registration;
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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UINTN FamilyId;
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UINTN ModelId;
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UINT32 Cr3;
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EFI_STATUS Status;
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EFI_MP_SERVICES_PROTOCOL *MpServices;
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UINTN NumberOfEnabledProcessors;
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UINTN Index;
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VOID *Buffer;
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UINTN BufferPages;
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UINTN TileCodeSize;
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UINTN TileDataSize;
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UINTN TileSize;
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UINT8 *Stacks;
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VOID *Registration;
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UINT32 RegEax;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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UINTN FamilyId;
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UINTN ModelId;
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UINT32 Cr3;
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//
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// Initialize address fixup
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@@ -598,10 +606,10 @@ PiCpuSmmEntry (
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// A constant BSP index makes no sense because it may be hot removed.
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//
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DEBUG_CODE_BEGIN ();
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if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
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if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
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ASSERT (FeaturePcdGet (PcdCpuSmmEnableBspElection));
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}
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ASSERT (FeaturePcdGet (PcdCpuSmmEnableBspElection));
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}
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DEBUG_CODE_END ();
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//
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@@ -625,6 +633,7 @@ PiCpuSmmEntry (
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} else {
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mMaxNumberOfCpus = mNumberOfCpus;
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}
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gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus = mMaxNumberOfCpus;
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//
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@@ -702,8 +711,8 @@ PiCpuSmmEntry (
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//
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AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);
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FamilyId = (RegEax >> 8) & 0xf;
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ModelId = (RegEax >> 4) & 0xf;
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if (FamilyId == 0x06 || FamilyId == 0x0f) {
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ModelId = (RegEax >> 4) & 0xf;
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if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
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ModelId = ModelId | ((RegEax >> 12) & 0xf0);
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}
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@@ -712,6 +721,7 @@ PiCpuSmmEntry (
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if (RegEax >= CPUID_EXTENDED_CPU_SIG) {
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AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);
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}
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//
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// Determine the mode of the CPU at the time an SMI occurs
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// Intel(R) 64 and IA-32 Architectures Software Developer's Manual
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@@ -721,8 +731,9 @@ PiCpuSmmEntry (
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if ((RegEdx & BIT29) != 0) {
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mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;
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}
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if (FamilyId == 0x06) {
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if (ModelId == 0x17 || ModelId == 0x0f || ModelId == 0x1c) {
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if ((ModelId == 0x17) || (ModelId == 0x0f) || (ModelId == 0x1c)) {
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mSmmSaveStateRegisterLma = EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT;
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}
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}
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@@ -739,17 +750,18 @@ PiCpuSmmEntry (
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mCetSupported = FALSE;
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PatchInstructionX86 (mPatchCetSupported, mCetSupported, 1);
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}
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if (mCetSupported) {
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AsmCpuidEx (CPUID_EXTENDED_STATE, CPUID_EXTENDED_STATE_SUB_LEAF, NULL, &RegEbx, &RegEcx, NULL);
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DEBUG ((DEBUG_INFO, "CPUID[D/1] EBX - 0x%08x, ECX - 0x%08x\n", RegEbx, RegEcx));
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AsmCpuidEx (CPUID_EXTENDED_STATE, 11, &RegEax, NULL, &RegEcx, NULL);
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DEBUG ((DEBUG_INFO, "CPUID[D/11] EAX - 0x%08x, ECX - 0x%08x\n", RegEax, RegEcx));
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AsmCpuidEx(CPUID_EXTENDED_STATE, 12, &RegEax, NULL, &RegEcx, NULL);
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AsmCpuidEx (CPUID_EXTENDED_STATE, 12, &RegEax, NULL, &RegEcx, NULL);
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DEBUG ((DEBUG_INFO, "CPUID[D/12] EAX - 0x%08x, ECX - 0x%08x\n", RegEax, RegEcx));
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}
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} else {
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mCetSupported = FALSE;
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PatchInstructionX86(mPatchCetSupported, mCetSupported, 1);
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PatchInstructionX86 (mPatchCetSupported, mCetSupported, 1);
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}
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} else {
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mCetSupported = FALSE;
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@@ -762,11 +774,11 @@ PiCpuSmmEntry (
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// This size is rounded up to nearest power of 2.
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//
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TileCodeSize = GetSmiHandlerSize ();
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TileCodeSize = ALIGN_VALUE(TileCodeSize, SIZE_4KB);
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TileCodeSize = ALIGN_VALUE (TileCodeSize, SIZE_4KB);
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TileDataSize = (SMRAM_SAVE_STATE_MAP_OFFSET - SMM_PSD_OFFSET) + sizeof (SMRAM_SAVE_STATE_MAP);
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TileDataSize = ALIGN_VALUE(TileDataSize, SIZE_4KB);
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TileSize = TileDataSize + TileCodeSize - 1;
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TileSize = 2 * GetPowerOfTwo32 ((UINT32)TileSize);
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TileDataSize = ALIGN_VALUE (TileDataSize, SIZE_4KB);
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TileSize = TileDataSize + TileCodeSize - 1;
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TileSize = 2 * GetPowerOfTwo32 ((UINT32)TileSize);
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DEBUG ((DEBUG_INFO, "SMRAM TileSize = 0x%08x (0x%08x, 0x%08x)\n", TileSize, TileCodeSize, TileDataSize));
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//
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@@ -796,8 +808,9 @@ PiCpuSmmEntry (
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} else {
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Buffer = AllocateAlignedCodePages (BufferPages, SIZE_4KB);
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}
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ASSERT (Buffer != NULL);
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DEBUG ((DEBUG_INFO, "SMRAM SaveState Buffer (0x%08x, 0x%08x)\n", Buffer, EFI_PAGES_TO_SIZE(BufferPages)));
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DEBUG ((DEBUG_INFO, "SMRAM SaveState Buffer (0x%08x, 0x%08x)\n", Buffer, EFI_PAGES_TO_SIZE (BufferPages)));
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//
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// Allocate buffer for pointers to array in SMM_CPU_PRIVATE_DATA.
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@@ -832,17 +845,19 @@ PiCpuSmmEntry (
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// size for each CPU in the platform
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//
|
||||
for (Index = 0; Index < mMaxNumberOfCpus; Index++) {
|
||||
mCpuHotPlugData.SmBase[Index] = (UINTN)Buffer + Index * TileSize - SMM_HANDLER_OFFSET;
|
||||
gSmmCpuPrivate->CpuSaveStateSize[Index] = sizeof(SMRAM_SAVE_STATE_MAP);
|
||||
mCpuHotPlugData.SmBase[Index] = (UINTN)Buffer + Index * TileSize - SMM_HANDLER_OFFSET;
|
||||
gSmmCpuPrivate->CpuSaveStateSize[Index] = sizeof (SMRAM_SAVE_STATE_MAP);
|
||||
gSmmCpuPrivate->CpuSaveState[Index] = (VOID *)(mCpuHotPlugData.SmBase[Index] + SMRAM_SAVE_STATE_MAP_OFFSET);
|
||||
gSmmCpuPrivate->Operation[Index] = SmmCpuNone;
|
||||
gSmmCpuPrivate->Operation[Index] = SmmCpuNone;
|
||||
|
||||
if (Index < mNumberOfCpus) {
|
||||
Status = MpServices->GetProcessorInfo (MpServices, Index, &gSmmCpuPrivate->ProcessorInfo[Index]);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
mCpuHotPlugData.ApicId[Index] = gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId;
|
||||
|
||||
DEBUG ((DEBUG_INFO, "CPU[%03x] APIC ID=%04x SMBASE=%08x SaveState=%08x Size=%08x\n",
|
||||
DEBUG ((
|
||||
DEBUG_INFO,
|
||||
"CPU[%03x] APIC ID=%04x SMBASE=%08x SaveState=%08x Size=%08x\n",
|
||||
Index,
|
||||
(UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId,
|
||||
mCpuHotPlugData.SmBase[Index],
|
||||
@@ -851,7 +866,7 @@ PiCpuSmmEntry (
|
||||
));
|
||||
} else {
|
||||
gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId = INVALID_APIC_ID;
|
||||
mCpuHotPlugData.ApicId[Index] = INVALID_APIC_ID;
|
||||
mCpuHotPlugData.ApicId[Index] = INVALID_APIC_ID;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -916,10 +931,10 @@ PiCpuSmmEntry (
|
||||
}
|
||||
}
|
||||
|
||||
Stacks = (UINT8 *) AllocatePages (gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus * (EFI_SIZE_TO_PAGES (mSmmStackSize + mSmmShadowStackSize)));
|
||||
Stacks = (UINT8 *)AllocatePages (gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus * (EFI_SIZE_TO_PAGES (mSmmStackSize + mSmmShadowStackSize)));
|
||||
ASSERT (Stacks != NULL);
|
||||
mSmmStackArrayBase = (UINTN)Stacks;
|
||||
mSmmStackArrayEnd = mSmmStackArrayBase + gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus * (mSmmStackSize + mSmmShadowStackSize) - 1;
|
||||
mSmmStackArrayEnd = mSmmStackArrayBase + gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus * (mSmmStackSize + mSmmShadowStackSize) - 1;
|
||||
|
||||
DEBUG ((DEBUG_INFO, "Stacks - 0x%x\n", Stacks));
|
||||
DEBUG ((DEBUG_INFO, "mSmmStackSize - 0x%x\n", mSmmStackSize));
|
||||
@@ -933,7 +948,7 @@ PiCpuSmmEntry (
|
||||
//
|
||||
PatchInstructionX86 (
|
||||
gPatchSmmInitStack,
|
||||
(UINTN) (Stacks + mSmmStackSize - sizeof (UINTN)),
|
||||
(UINTN)(Stacks + mSmmStackSize - sizeof (UINTN)),
|
||||
sizeof (UINTN)
|
||||
);
|
||||
|
||||
@@ -977,8 +992,8 @@ PiCpuSmmEntry (
|
||||
if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
|
||||
SetNotPresentPage (
|
||||
Cr3,
|
||||
(EFI_PHYSICAL_ADDRESS)(UINTN)Stacks + mSmmStackSize + EFI_PAGES_TO_SIZE(1) + (mSmmStackSize + mSmmShadowStackSize) * Index,
|
||||
EFI_PAGES_TO_SIZE(1)
|
||||
(EFI_PHYSICAL_ADDRESS)(UINTN)Stacks + mSmmStackSize + EFI_PAGES_TO_SIZE (1) + (mSmmStackSize + mSmmShadowStackSize) * Index,
|
||||
EFI_PAGES_TO_SIZE (1)
|
||||
);
|
||||
}
|
||||
}
|
||||
@@ -997,7 +1012,8 @@ PiCpuSmmEntry (
|
||||
//
|
||||
Status = SystemTable->BootServices->InstallMultipleProtocolInterfaces (
|
||||
&gSmmCpuPrivate->SmmCpuHandle,
|
||||
&gEfiSmmConfigurationProtocolGuid, &gSmmCpuPrivate->SmmConfiguration,
|
||||
&gEfiSmmConfigurationProtocolGuid,
|
||||
&gSmmCpuPrivate->SmmConfiguration,
|
||||
NULL
|
||||
);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
@@ -1087,17 +1103,17 @@ PiCpuSmmEntry (
|
||||
**/
|
||||
VOID
|
||||
FindSmramInfo (
|
||||
OUT UINT32 *SmrrBase,
|
||||
OUT UINT32 *SmrrSize
|
||||
OUT UINT32 *SmrrBase,
|
||||
OUT UINT32 *SmrrSize
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINTN Size;
|
||||
EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;
|
||||
EFI_SMRAM_DESCRIPTOR *CurrentSmramRange;
|
||||
UINTN Index;
|
||||
UINT64 MaxSize;
|
||||
BOOLEAN Found;
|
||||
EFI_STATUS Status;
|
||||
UINTN Size;
|
||||
EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;
|
||||
EFI_SMRAM_DESCRIPTOR *CurrentSmramRange;
|
||||
UINTN Index;
|
||||
UINT64 MaxSize;
|
||||
BOOLEAN Found;
|
||||
|
||||
//
|
||||
// Get SMM Access Protocol
|
||||
@@ -1108,7 +1124,7 @@ FindSmramInfo (
|
||||
//
|
||||
// Get SMRAM information
|
||||
//
|
||||
Size = 0;
|
||||
Size = 0;
|
||||
Status = SmmAccess->GetCapabilities (SmmAccess, &Size, NULL);
|
||||
ASSERT (Status == EFI_BUFFER_TOO_SMALL);
|
||||
|
||||
@@ -1135,7 +1151,7 @@ FindSmramInfo (
|
||||
if (mSmmCpuSmramRanges[Index].CpuStart >= BASE_1MB) {
|
||||
if ((mSmmCpuSmramRanges[Index].CpuStart + mSmmCpuSmramRanges[Index].PhysicalSize) <= SMRR_MAX_ADDRESS) {
|
||||
if (mSmmCpuSmramRanges[Index].PhysicalSize >= MaxSize) {
|
||||
MaxSize = mSmmCpuSmramRanges[Index].PhysicalSize;
|
||||
MaxSize = mSmmCpuSmramRanges[Index].PhysicalSize;
|
||||
CurrentSmramRange = &mSmmCpuSmramRanges[Index];
|
||||
}
|
||||
}
|
||||
@@ -1150,14 +1166,15 @@ FindSmramInfo (
|
||||
do {
|
||||
Found = FALSE;
|
||||
for (Index = 0; Index < mSmmCpuSmramRangeCount; Index++) {
|
||||
if (mSmmCpuSmramRanges[Index].CpuStart < *SmrrBase &&
|
||||
*SmrrBase == (mSmmCpuSmramRanges[Index].CpuStart + mSmmCpuSmramRanges[Index].PhysicalSize)) {
|
||||
if ((mSmmCpuSmramRanges[Index].CpuStart < *SmrrBase) &&
|
||||
(*SmrrBase == (mSmmCpuSmramRanges[Index].CpuStart + mSmmCpuSmramRanges[Index].PhysicalSize)))
|
||||
{
|
||||
*SmrrBase = (UINT32)mSmmCpuSmramRanges[Index].CpuStart;
|
||||
*SmrrSize = (UINT32)(*SmrrSize + mSmmCpuSmramRanges[Index].PhysicalSize);
|
||||
Found = TRUE;
|
||||
} else if ((*SmrrBase + *SmrrSize) == mSmmCpuSmramRanges[Index].CpuStart && mSmmCpuSmramRanges[Index].PhysicalSize > 0) {
|
||||
Found = TRUE;
|
||||
} else if (((*SmrrBase + *SmrrSize) == mSmmCpuSmramRanges[Index].CpuStart) && (mSmmCpuSmramRanges[Index].PhysicalSize > 0)) {
|
||||
*SmrrSize = (UINT32)(*SmrrSize + mSmmCpuSmramRanges[Index].PhysicalSize);
|
||||
Found = TRUE;
|
||||
Found = TRUE;
|
||||
}
|
||||
}
|
||||
} while (Found);
|
||||
@@ -1272,6 +1289,7 @@ ConfigSmmCodeAccessCheck (
|
||||
//
|
||||
continue;
|
||||
}
|
||||
|
||||
//
|
||||
// Acquire Config SMM Code Access Check spin lock. The AP will release the
|
||||
// spin lock when it is done executing ConfigSmmCodeAccessCheckOnCurrentProcessor().
|
||||
@@ -1316,7 +1334,7 @@ ConfigSmmCodeAccessCheck (
|
||||
**/
|
||||
VOID *
|
||||
AllocatePageTableMemory (
|
||||
IN UINTN Pages
|
||||
IN UINTN Pages
|
||||
)
|
||||
{
|
||||
VOID *Buffer;
|
||||
@@ -1325,6 +1343,7 @@ AllocatePageTableMemory (
|
||||
if (Buffer != NULL) {
|
||||
return Buffer;
|
||||
}
|
||||
|
||||
return AllocatePages (Pages);
|
||||
}
|
||||
|
||||
@@ -1337,7 +1356,7 @@ AllocatePageTableMemory (
|
||||
**/
|
||||
VOID *
|
||||
AllocateCodePages (
|
||||
IN UINTN Pages
|
||||
IN UINTN Pages
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
@@ -1351,7 +1370,8 @@ AllocateCodePages (
|
||||
if (EFI_ERROR (Status)) {
|
||||
return NULL;
|
||||
}
|
||||
return (VOID *) (UINTN) Memory;
|
||||
|
||||
return (VOID *)(UINTN)Memory;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1366,8 +1386,8 @@ AllocateCodePages (
|
||||
**/
|
||||
VOID *
|
||||
AllocateAlignedCodePages (
|
||||
IN UINTN Pages,
|
||||
IN UINTN Alignment
|
||||
IN UINTN Pages,
|
||||
IN UINTN Alignment
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
@@ -1385,23 +1405,25 @@ AllocateAlignedCodePages (
|
||||
if (Pages == 0) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (Alignment > EFI_PAGE_SIZE) {
|
||||
//
|
||||
// Calculate the total number of pages since alignment is larger than page size.
|
||||
//
|
||||
AlignmentMask = Alignment - 1;
|
||||
RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment);
|
||||
AlignmentMask = Alignment - 1;
|
||||
RealPages = Pages + EFI_SIZE_TO_PAGES (Alignment);
|
||||
//
|
||||
// Make sure that Pages plus EFI_SIZE_TO_PAGES (Alignment) does not overflow.
|
||||
//
|
||||
ASSERT (RealPages > Pages);
|
||||
|
||||
Status = gSmst->SmmAllocatePages (AllocateAnyPages, EfiRuntimeServicesCode, RealPages, &Memory);
|
||||
Status = gSmst->SmmAllocatePages (AllocateAnyPages, EfiRuntimeServicesCode, RealPages, &Memory);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return NULL;
|
||||
}
|
||||
AlignedMemory = ((UINTN) Memory + AlignmentMask) & ~AlignmentMask;
|
||||
UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN) Memory);
|
||||
|
||||
AlignedMemory = ((UINTN)Memory + AlignmentMask) & ~AlignmentMask;
|
||||
UnalignedPages = EFI_SIZE_TO_PAGES (AlignedMemory - (UINTN)Memory);
|
||||
if (UnalignedPages > 0) {
|
||||
//
|
||||
// Free first unaligned page(s).
|
||||
@@ -1409,6 +1431,7 @@ AllocateAlignedCodePages (
|
||||
Status = gSmst->SmmFreePages (Memory, UnalignedPages);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
}
|
||||
|
||||
Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);
|
||||
UnalignedPages = RealPages - Pages - UnalignedPages;
|
||||
if (UnalignedPages > 0) {
|
||||
@@ -1426,9 +1449,11 @@ AllocateAlignedCodePages (
|
||||
if (EFI_ERROR (Status)) {
|
||||
return NULL;
|
||||
}
|
||||
AlignedMemory = (UINTN) Memory;
|
||||
|
||||
AlignedMemory = (UINTN)Memory;
|
||||
}
|
||||
return (VOID *) AlignedMemory;
|
||||
|
||||
return (VOID *)AlignedMemory;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1447,6 +1472,7 @@ PerformRemainingTasks (
|
||||
if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
|
||||
SmmProfileStart ();
|
||||
}
|
||||
|
||||
//
|
||||
// Create a mix of 2MB and 4KB page table. Update some memory ranges absent and execute-disable.
|
||||
//
|
||||
|
||||
Reference in New Issue
Block a user