UefiCpuPkg: Add Unit tests for PeiCpuExceptionHandlerLib
The previous change adds unit test for DxeCpuExeptionHandlerLib in 64bit mode. This change create a PEIM to add unit test for PeiCpuExceptionHandlerLib based on previous change.It can run in both 32bit and 64bit modes. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
Tan, Dun
mergify[bot]
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; ArchExceptionHandlerTestAsm.nasm
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;
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; Abstract:
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;
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; ia32 CPU Exception Handler Lib Unit test
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;
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;------------------------------------------------------------------------------
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SECTION .text
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struc GENERAL_REGISTER_IA32
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.Edi: resd 1
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.Esi: resd 1
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.Ebx: resd 1
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.Edx: resd 1
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.Ecx: resd 1
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.Eax: resd 1
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endstruc
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extern ASM_PFX(mExpectedContextInHandler)
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extern ASM_PFX(mActualContextAfterException)
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extern ASM_PFX(mFaultInstructionLength)
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; TriggerGPException (
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; UINTN Cr4ReservedBit
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(TriggerGPException)
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ASM_PFX(TriggerGPException):
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;
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; Set reserved bit 15 of cr4 to 1
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;
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lea ecx, [ASM_PFX(mFaultInstructionLength)]
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mov dword[ecx], TriggerGPExceptionAfter - TriggerGPExceptionBefore
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mov ecx, dword [esp + 0x4]
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TriggerGPExceptionBefore:
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mov cr4, ecx
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TriggerGPExceptionAfter:
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; TriggerPFException (
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; UINTN PfAddress
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(TriggerPFException)
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ASM_PFX(TriggerPFException):
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lea ecx, [ASM_PFX(mFaultInstructionLength)]
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mov dword[ecx], TriggerPFExceptionAfter - TriggerPFExceptionBefore
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mov ecx, dword [esp + 0x4]
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TriggerPFExceptionBefore:
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mov dword[ecx], 0x1
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TriggerPFExceptionAfter:
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ret
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;------------------------------------------------------------------------------
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; ModifyEcxInGlobalBeforeException;
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; This function is writed by assebly code because it's only called in this file.
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; It's used to set Ecx in mExpectedContextInHandler for different exception.
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;------------------------------------------------------------------------------
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global ASM_PFX(ModifyEcxInGlobalBeforeException)
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ASM_PFX(ModifyEcxInGlobalBeforeException):
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push eax
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lea eax, [ASM_PFX(mExpectedContextInHandler)]
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mov [eax + GENERAL_REGISTER_IA32.Ecx], ecx
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pop eax
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ret
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;------------------------------------------------------------------------------
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;VOID
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;EFIAPI
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;AsmTestConsistencyOfCpuContext (
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; IN EFI_EXCEPTION_TYPE ExceptionType
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; IN UINTN FaultParameter OPTIONAL
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(AsmTestConsistencyOfCpuContext)
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ASM_PFX(AsmTestConsistencyOfCpuContext):
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;
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; push 7 general register plus 4 bytes
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;
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pushad
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;
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; Modify register to mExpectedContextInHandler. Do not handle Esp and Ebp.
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; CpuExceptionHandlerLib doesn't set Esp and Esp register to the value in SystemContext.
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;
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lea eax, [ASM_PFX(mExpectedContextInHandler)]
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mov edi, [eax + GENERAL_REGISTER_IA32.Edi]
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mov esi, [eax + GENERAL_REGISTER_IA32.Esi]
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mov ebx, [eax + GENERAL_REGISTER_IA32.Ebx]
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mov edx, [eax + GENERAL_REGISTER_IA32.Edx]
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;
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; Set ecx to ExceptionType
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;
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mov ecx, dword [esp + 0x24]
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mov eax, [eax + GENERAL_REGISTER_IA32.Eax]
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cmp ecx, 0xd
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jz GPException
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cmp ecx, 0xe
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jz PFException
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jmp INTnException
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PFException:
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mov ecx, dword [esp + 0x28] ; Set ecx to PFAddress.
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call ASM_PFX(ModifyEcxInGlobalBeforeException) ; Set mExpectedContextInHandler.Ecx to PFAddress.
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push ecx ; Push PfAddress into stack.
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call ASM_PFX(TriggerPFException)
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jmp AfterException
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GPException:
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mov ecx, dword [esp + 0x28] ; Set ecx to CR4_RESERVED_BIT.
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call ASM_PFX(ModifyEcxInGlobalBeforeException) ; Set mExpectedContextInHandler.Ecx to CR4_RESERVED_BIT.
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push ecx ; Push CR4_RESERVED_BIT into stack.
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call ASM_PFX(TriggerGPException)
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jmp AfterException
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INTnException:
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call ASM_PFX(ModifyEcxInGlobalBeforeException) ; Set mExpectedContextInHandler.Ecx to ExceptionType.
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push ecx ; Push ExceptionType into stack.
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call ASM_PFX(TriggerINTnException)
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AfterException:
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;
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; Save register in mActualContextAfterException.
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;
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push eax
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lea eax, [ASM_PFX(mActualContextAfterException)]
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mov [eax + GENERAL_REGISTER_IA32.Edi], edi
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mov [eax + GENERAL_REGISTER_IA32.Esi], esi
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mov [eax + GENERAL_REGISTER_IA32.Ebx], ebx
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mov [eax + GENERAL_REGISTER_IA32.Edx], edx
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mov [eax + GENERAL_REGISTER_IA32.Ecx], ecx
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pop ecx
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mov [eax + GENERAL_REGISTER_IA32.Eax], ecx
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add esp, 4
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;
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; restore original register
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;
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popad
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; TriggerStackOverflow (
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; VOID
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(TriggerStackOverflow)
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ASM_PFX(TriggerStackOverflow):
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lea ecx, [ASM_PFX(mFaultInstructionLength)]
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mov dword[ecx], TriggerCpuStackGuardAfter - TriggerCpuStackGuardBefore
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TriggerCpuStackGuardBefore:
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;
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; Clear CR0.TS since it is set after return from a nested DF
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;
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call TriggerCpuStackGuardBefore
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clts
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TriggerCpuStackGuardAfter:
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; TriggerINTnException (
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; IN EFI_EXCEPTION_TYPE ExceptionType
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(TriggerINTnException)
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ASM_PFX(TriggerINTnException):
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push eax
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push edx
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lea eax, [AsmTriggerException1 - AsmTriggerException0]
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mov ecx, dword [esp + 0xc]
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push ecx
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mul ecx
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mov ecx, AsmTriggerException0
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add eax, ecx
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pop ecx
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pop edx
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jmp eax
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;
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; eax = AsmTriggerException0 + (AsmTriggerException1 - AsmTriggerException0) * ecx
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;
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%assign Vector 0
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%rep 22
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AsmTriggerException %+ Vector:
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pop eax
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INT Vector
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ret
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%assign Vector Vector+1
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%endrep
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