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1. Add Max Try Times check to clear Ps2Kbd status register. If exceed the max try times, the device may be error.

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2. To follow PI spec, PciCfg PPI doesn't require ASSERT for the unalign PCI IO access.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6659 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4
2008-11-21 05:55:40 +00:00
parent d4a20ec9dc
commit 05f89b17b8
4 changed files with 32 additions and 8 deletions
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7
IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf
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@@ -55,6 +55,13 @@
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfgDisable
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfg2Disable
[FixedPcd.common]
##
# Disable ASSERT for unalign PCI IO access according to PI Volume 1 and PeiCis Spec
# Spec has not this requirement.
##
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0E
[Depex]
TRUE