ArmPlatformPkg: Introduce Primary core macros

On MpCore system, the primary core can now be any core of the system.

To identify the primary core, you can use 'gArmTokenSpaceGuid.PcdArmPrimaryCoreMask'
and 'gArmTokenSpaceGuid.PcdArmPrimaryCore'.
These PCDs by default use the ClusterId and CoreId to identify the core. And the
primary core is defined as the ClusetrId=0 and CoreId=0.

The helper macros are: IS_PRIMARY_CORE(MpId), GET_CORE_ID(MpId), GET_CLUSTER_ID(MpId),
GET_CORE_POS(MpId), PRIMARY_CORE_ID.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12412 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-09-22 23:01:13 +00:00
parent 55a0d64b88
commit 0787bc6184
24 changed files with 95 additions and 60 deletions

View File

@@ -41,7 +41,7 @@ PrimaryMain (
VOID
SecondaryMain (
IN UINTN CoreId
IN UINTN MpId
)
{
// Function pointer to Secondary Core entry point
@@ -54,7 +54,7 @@ SecondaryMain (
while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
ArmCallWFI();
// Acknowledge the interrupt and send End of Interrupt signal.
ArmGicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),0/*CoreId*/);
ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
}
secondary_start = (VOID (*)())secondary_entry_addr;

View File

@@ -28,7 +28,7 @@ PrimaryMain (
VOID
SecondaryMain (
IN UINTN CoreId
IN UINTN MpId
)
{
// We must never get into this function on UniCore system

View File

@@ -21,15 +21,17 @@
# Global symbols referenced by this module
GCC_ASM_IMPORT(CEntryPoint)
GCC_ASM_IMPORT(ArmReadMpidr)
GCC_ASM_EXPORT(_ModuleEntryPoint)
StartupAddr: .word CEntryPoint
ASM_PFX(_ModuleEntryPoint):
// Identify CPU ID
mrc p15, 0, r0, c0, c0, 5
and r0, #0xf
// Get ID of this CPU in Multicore system
bl ASM_PFX(ArmReadMpidr)
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
and r0, r0, r1
_SetSVCMode:
// Enter SVC mode
@@ -94,7 +96,7 @@ _PrepareArguments:
ldr r2, StartupAddr
// Jump to PrePiCore C code
// r0 = core_id
// r0 = MpId
// r1 = UefiMemoryBase
blx r2

View File

@@ -19,6 +19,7 @@
INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
IMPORT ArmReadMpidr
EXPORT _ModuleEntryPoint
PRESERVE8
@@ -27,9 +28,10 @@
StartupAddr DCD CEntryPoint
_ModuleEntryPoint
// Identify CPU ID
mrc p15, 0, r0, c0, c0, 5
and r0, #0xf
// Get ID of this CPU in Multicore system
bl ArmReadMpidr
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
and r5, r0, r1
_SetSVCMode
// Enter SVC mode
@@ -94,7 +96,7 @@ _PrepareArguments
ldr r2, StartupAddr
// Jump to PrePiCore C code
// r0 = core_id
// r0 = MpId
// r1 = UefiMemoryBase
blx r2

View File

@@ -78,7 +78,10 @@
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores
gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize

View File

@@ -136,13 +136,13 @@ PrePiMain (
VOID
CEntryPoint (
IN UINTN CoreId,
IN UINTN MpId,
IN UINTN UefiMemoryBase
)
{
UINT64 StartTimeStamp;
if ((CoreId == ARM_PRIMARY_CORE) && PerformanceMeasurementEnabled ()) {
if (IS_PRIMARY_CORE(MpId) && PerformanceMeasurementEnabled ()) {
// Initialize the Timer Library to setup the Timer HW controller
TimerConstructor ();
// We cannot call yet the PerformanceLib because the HOB List has not been initialized
@@ -168,11 +168,11 @@ CEntryPoint (
ArmWriteVBar ((UINT32)PrePiVectorTable);
// If not primary Jump to Secondary Main
if (CoreId == ARM_PRIMARY_CORE) {
if (IS_PRIMARY_CORE(MpId)) {
// Goto primary Main.
PrimaryMain (UefiMemoryBase, StartTimeStamp);
} else {
SecondaryMain (CoreId);
SecondaryMain (MpId);
}
// DXE Core should always load and never return

View File

@@ -27,7 +27,6 @@
#include <Chipset/ArmV7.h>
#define ARM_PRIMARY_CORE 0
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);
// Vector Table for PrePi Phase
@@ -69,7 +68,7 @@ PrimaryMain (
VOID
SecondaryMain (
IN UINTN CoreId
IN UINTN MpId
);
// Either implemented by PrePiLib or by MemoryInitPei