sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or FXSAVE/FXRESTOR

Browse Source 
Use CPUID Leaf 01 to detect support for debug extensions and FXSAVE/FXRESTOR instructions.
Do not enable those features in CR4 if they are not supported.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>





git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17221 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Michael Kinney
2015-04-27 19:54:52 +00:00
committed by mdkinney
parent 5f72e68c90
commit 087c67d0a0
5 changed files with 59 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
View File

@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
; Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -250,10 +250,22 @@ ErrorCodeAndVectorOnStack:
push eax
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
mov eax, 1
push ebx ; temporarily save value of ebx on stack
cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and DE
; are supported
pop ebx ; retore value of ebx that was overwritten by CPUID
mov eax, cr4
or eax, 208h
push eax ; push cr4 firstly
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
jz @F
or eax, BIT9 ; Set CR4.OSFXSR
@@:
test edx, BIT2 ; Test for Debugging Extensions support
jz @F
or eax, BIT3 ; Set CR4.DE
@@:
mov cr4, eax
push eax
mov eax, cr3
push eax
mov eax, cr2
@@ -280,7 +292,11 @@ ErrorCodeAndVectorOnStack:
;; FX_SAVE_STATE_IA32 FxSaveState;
sub esp, 512
mov edi, esp
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
; edx still contains result from CPUID above
jz @F
db 0fh, 0aeh, 07h ;fxsave [edi]
@@:
;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
cld
@@ -307,7 +323,13 @@ ErrorCodeAndVectorOnStack:
;; FX_SAVE_STATE_IA32 FxSaveState;
mov esi, esp
mov eax, 1
cpuid ; use CPUID to determine if FXSAVE/FXRESTOR
; are supported
test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
jz @F
db 0fh, 0aeh, 0eh ; fxrstor [esi]
@@:
add esp, 512
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;