ArmVirtPkg/FdtPL011SerialPortLib: Set the PL011 UART clock rate
The interface to PL011UartInitializePort has changed in ArmPlatformPkg/Drivers/PL011Uart with the title: "ArmPlatformPkg: Add support to configure PL011 UART clock" This patch updates the calls to PL011UartInitializePort(), in line with that change, adding a parameter value using the PCD previously used directly by the driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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Ard Biesheuvel
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f63005282c
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090916d8bc
@@ -81,8 +81,14 @@ FdtPL011SerialPortLibInitialize (
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StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);
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return PL011UartInitializePort (
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mSerialBaseAddress, &BaudRate, &ReceiveFifoDepth,
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&Parity, &DataBits, &StopBits);
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mSerialBaseAddress,
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FixedPcdGet32 (PL011UartClkInHz),
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&BaudRate,
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&ReceiveFifoDepth,
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&Parity,
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&DataBits,
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&StopBits
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);
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}
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/**
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