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IntelFrameworkModulePkg: Clean up source files

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Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Liming Gao
2018-06-27 21:06:35 +08:00
parent e38f26a2f7
commit 0a6f48249a
246 changed files with 4071 additions and 4071 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Ipf/IpfBootSupport.c
View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -248,7 +248,7 @@ RelocateImageUnder4GIfNeeded (
//
// Create a new handle with gEfiCallerIdGuid to be used as the ImageHandle fore the reloaded image
//
//
NewImageHandle = NULL;
Status = gBS->InstallProtocolInterface (
&NewImageHandle,

4
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBbs.c
View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -31,7 +31,7 @@ BOOLEAN IsHaveMediaInFloppy = TRUE;
/**
Checks the state of the floppy and if media is inserted.
This routine checks the state of the floppy and if media is inserted.
There are 3 cases:
No floppy present - Set BBS entry to ignore

42
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
View File

@@ -271,7 +271,7 @@ ShadowAndStartLegacy16 (
if (EFI_ERROR (Status)) {
//
// Bugbug: need to figure out whether C/D/E/F segment should be marked as reserved memory.
//
//
DEBUG ((DEBUG_ERROR, "Failed to allocate the C/D/E/F segment Status = %r", Status));
}
}
@@ -415,7 +415,7 @@ ShadowAndStartLegacy16 (
Private->Legacy8259->GetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
NewMask = 0xFFFF;
Private->Legacy8259->SetMask(Private->Legacy8259, &NewMask, NULL, NULL, NULL);
//
// Call into Legacy16 code to do an INIT
//
@@ -437,7 +437,7 @@ ShadowAndStartLegacy16 (
// Restore original legacy interrupt mask value
//
Private->Legacy8259->SetMask(Private->Legacy8259, &OldMask, NULL, NULL, NULL);
if (Regs.X.AX != 0) {
return EFI_DEVICE_ERROR;
}
@@ -653,7 +653,7 @@ GetPciInterfaceVersion (
UINT16 PciInterfaceVersion;
PciInterfaceVersion = 0;
Reg.X.AX = 0xB101;
Reg.E.EDI = 0;
@@ -693,7 +693,7 @@ InstallSmbiosEventCallback (
{
EFI_STATUS Status;
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
//
// Get SMBIOS table from EFI configuration table
//
@@ -704,7 +704,7 @@ InstallSmbiosEventCallback (
if ((EFI_ERROR (Status)) || (mRuntimeSmbiosEntryPoint == NULL)) {
return;
}
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *) mRuntimeSmbiosEntryPoint;
//
@@ -728,8 +728,8 @@ InstallSmbiosEventCallback (
}
DEBUG ((EFI_D_INFO, "Allocate memory for Smbios Entry Point Structure\n"));
}
if ((mStructureTableAddress != 0) &&
if ((mStructureTableAddress != 0) &&
(mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {
//
// If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate
@@ -739,7 +739,7 @@ InstallSmbiosEventCallback (
mStructureTablePages = 0;
DEBUG ((EFI_D_INFO, "Original size is not enough. Re-allocate the memory.\n"));
}
if (mStructureTableAddress == 0) {
//
// Allocate reserved memory below 4GB.
@@ -755,7 +755,7 @@ InstallSmbiosEventCallback (
);
if (EFI_ERROR (Status)) {
gBS->FreePages (
mReserveSmbiosEntryPoint,
mReserveSmbiosEntryPoint,
EFI_SIZE_TO_PAGES ((UINTN) (EntryPointStructure->EntryPointLength))
);
mReserveSmbiosEntryPoint = 0;
@@ -843,7 +843,7 @@ LegacyBiosInstall (
FreePool (SecureBoot);
return EFI_SECURITY_VIOLATION;
}
if (SecureBoot != NULL) {
FreePool (SecureBoot);
}
@@ -1047,7 +1047,7 @@ LegacyBiosInstall (
// Allocate low PMM memory and zero it out
//
MemorySize = PcdGet32 (PcdLowPmmMemorySize);
ASSERT ((MemorySize & 0xFFF) == 0);
ASSERT ((MemorySize & 0xFFF) == 0);
Status = AllocateLegacyMemory (
AllocateMaxAddress,
EfiBootServicesCode,
@@ -1089,7 +1089,7 @@ LegacyBiosInstall (
ASSERT ((MemorySize & 0xFFF) == 0);
//
// Allocate high PMM Memory under 16 MB
//
//
Status = AllocateLegacyMemory (
AllocateMaxAddress,
EfiBootServicesCode,
@@ -1100,19 +1100,19 @@ LegacyBiosInstall (
if (EFI_ERROR (Status)) {
//
// If it fails, allocate high PMM Memory under 4GB
//
//
Status = AllocateLegacyMemory (
AllocateMaxAddress,
EfiBootServicesCode,
0xFFFFFFFF,
EFI_SIZE_TO_PAGES (MemorySize),
&MemoryAddress
);
);
}
if (!EFI_ERROR (Status)) {
EfiToLegacy16InitTable->HiPmmMemory = (UINT32) (EFI_PHYSICAL_ADDRESS) (UINTN) MemoryAddress;
EfiToLegacy16InitTable->HiPmmMemorySizeInBytes = MemorySize;
}
}
//
// ShutdownAPs();
@@ -1149,7 +1149,7 @@ LegacyBiosInstall (
// Save EFI value
//
Private->ThunkSeg = (UINT16) (EFI_SEGMENT (IntRedirCode));
//
// Allocate reserved memory for SMBIOS table used in legacy boot if SMBIOS table exists
//
@@ -1166,7 +1166,7 @@ LegacyBiosInstall (
&gEfiSmbiosTableGuid,
&InstallSmbiosEvent
);
ASSERT_EFI_ERROR (Status);
ASSERT_EFI_ERROR (Status);
//
// Create callback to update status of EndOfDxe, which is needed by NULL
@@ -1193,9 +1193,9 @@ LegacyBiosInstall (
&Private->LegacyBios
);
Private->Csm16PciInterfaceVersion = GetPciInterfaceVersion (Private);
DEBUG ((EFI_D_INFO, "CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8) (Private->Csm16PciInterfaceVersion >> 8),
DEBUG ((EFI_D_INFO, "CSM16 PCI BIOS Interface Version: %02x.%02x\n",
(UINT8) (Private->Csm16PciInterfaceVersion >> 8),
(UINT8) Private->Csm16PciInterfaceVersion
));
ASSERT (Private->Csm16PciInterfaceVersion != 0);

4
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.uni
View File

@@ -3,14 +3,14 @@
//
// This driver installs Legacy Bios Protocol to support CSM module work in EFI system.
//
// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions
// of the BSD License which accompanies this distribution. The
// full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//

6
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxeExtra.uni
View File

@@ -1,7 +1,7 @@
// /** @file
// LegacyBiosDxe Localized Strings and Content
//
// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions
@@ -14,8 +14,8 @@
//
// **/
#string STR_PROPERTIES_MODULE_NAME
#language en-US
#string STR_PROPERTIES_MODULE_NAME
#language en-US
"Legacy BIOS Support DXE Driver"

22
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
View File

@@ -101,9 +101,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
//
// When we call CSM16 functions, some CSM16 use es:[offset + 0xabcd] to get data passed from CSM32,
// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode.
// So this will keep offset as small as possible to avoid offset overflow in real mode.
// When we call CSM16 functions, some CSM16 use es:[offset + 0xabcd] to get data passed from CSM32,
// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode.
// So this will keep offset as small as possible to avoid offset overflow in real mode.
//
#define NORMALIZE_EFI_SEGMENT(_Adr) (UINT16) (((UINTN) (_Adr)) >> 4)
#define NORMALIZE_EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xf)
@@ -544,7 +544,7 @@ extern BOOLEAN mEndOfDxe;
//
// Timer 0, Read/Write LSB then MSB, Square wave output, binary count use.
//
#define TIMER0_CONTROL_WORD 0x36
#define TIMER0_CONTROL_WORD 0x36
#define LEGACY_BIOS_INSTANCE_SIGNATURE SIGNATURE_32 ('L', 'B', 'I', 'T')
typedef struct {
@@ -556,16 +556,16 @@ typedef struct {
EFI_HANDLE ImageHandle;
//
// CPU Architectural Protocol
// CPU Architectural Protocol
//
EFI_CPU_ARCH_PROTOCOL *Cpu;
//
// Timer Architectural Protocol
// Timer Architectural Protocol
//
EFI_TIMER_ARCH_PROTOCOL *Timer;
BOOLEAN TimerUses8254;
BOOLEAN TimerUses8254;
//
// Protocol to Lock and Unlock 0xc0000 - 0xfffff
//
@@ -577,7 +577,7 @@ typedef struct {
// Interrupt control for thunk and PCI IRQ
//
EFI_LEGACY_8259_PROTOCOL *Legacy8259;
//
// PCI Interrupt PIRQ control
//
@@ -673,7 +673,7 @@ typedef struct {
//
// Indicate that whether GenericLegacyBoot is entered or not
//
BOOLEAN LegacyBootEntered;
BOOLEAN LegacyBootEntered;
//
// CSM16 PCI Interface Version
@@ -1350,7 +1350,7 @@ ShadowAndStartLegacy16 (
/**
Checks the state of the floppy and if media is inserted.
This routine checks the state of the floppy and if media is inserted.
There are 3 cases:
No floppy present - Set BBS entry to ignore

32
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -791,15 +791,15 @@ CreateSmbiosTableInReservedMemory (
)
{
SMBIOS_TABLE_ENTRY_POINT *EntryPointStructure;
if ((mRuntimeSmbiosEntryPoint == NULL) ||
(mReserveSmbiosEntryPoint == 0) ||
if ((mRuntimeSmbiosEntryPoint == NULL) ||
(mReserveSmbiosEntryPoint == 0) ||
(mStructureTableAddress == 0)) {
return;
}
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *) mRuntimeSmbiosEntryPoint;
//
// Copy SMBIOS Entry Point Structure
//
@@ -808,7 +808,7 @@ CreateSmbiosTableInReservedMemory (
EntryPointStructure,
EntryPointStructure->EntryPointLength
);
//
// Copy SMBIOS Structure Table into EfiReservedMemoryType memory
//
@@ -817,22 +817,22 @@ CreateSmbiosTableInReservedMemory (
(VOID *)(UINTN) EntryPointStructure->TableAddress,
EntryPointStructure->TableLength
);
//
// Update TableAddress in Entry Point Structure
//
EntryPointStructure = (SMBIOS_TABLE_ENTRY_POINT *)(UINTN) mReserveSmbiosEntryPoint;
EntryPointStructure->TableAddress = (UINT32)(UINTN) mStructureTableAddress;
//
// Fixup checksums in the Entry Point Structure
//
EntryPointStructure->IntermediateChecksum = 0;
EntryPointStructure->EntryPointStructureChecksum = 0;
EntryPointStructure->IntermediateChecksum =
EntryPointStructure->IntermediateChecksum =
CalculateCheckSum8 (
(UINT8 *) EntryPointStructure + OFFSET_OF (SMBIOS_TABLE_ENTRY_POINT, IntermediateAnchorString),
(UINT8 *) EntryPointStructure + OFFSET_OF (SMBIOS_TABLE_ENTRY_POINT, IntermediateAnchorString),
EntryPointStructure->EntryPointLength - OFFSET_OF (SMBIOS_TABLE_ENTRY_POINT, IntermediateAnchorString)
);
EntryPointStructure->EntryPointStructureChecksum =
@@ -898,7 +898,7 @@ GenericLegacyBoot (
EfiToLegacy16BootTable->MajorVersion = EFI_TO_LEGACY_MAJOR_VERSION;
EfiToLegacy16BootTable->MinorVersion = EFI_TO_LEGACY_MINOR_VERSION;
//
// If booting to a legacy OS then force HDD drives to the appropriate
// boot mode by calling GetIdeHandle.
@@ -916,7 +916,7 @@ GenericLegacyBoot (
);
if (!EFI_ERROR (Status)) {
IdeController = HandleBuffer[0];
}
}
}
//
// Unlock the Legacy BIOS region
@@ -1295,7 +1295,7 @@ GenericLegacyBoot (
// Disable DXE Timer while executing in real mode
//
Private->Timer->SetTimerPeriod (Private->Timer, 0);
//
// Save and disable interrupt of debug timer
//
@@ -1464,8 +1464,8 @@ LegacyBiosBootUnconventionalDevice (
}
UcdTable = (UD_TABLE *) AllocatePool (
sizeof (UD_TABLE)
);
sizeof (UD_TABLE)
);
if (NULL == UcdTable) {
return EFI_OUT_OF_RESOURCES;
}

8
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyIde.c
View File

@@ -1,7 +1,7 @@
/** @file
Collect IDE information from Native EFI Driver
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -76,7 +76,7 @@ LegacyBiosBuildIdeData (
(VOID *) &LocalHddInfo
);
if (!EFI_ERROR (Status)) {
IdeController = HandleBuffer[0];
IdeController = HandleBuffer[0];
//
// Force IDE drive spin up!
//
@@ -279,8 +279,8 @@ InitLegacyIdeController (
// and has PCI I/O resources allocated
//
Status = gBS->HandleProtocol (
IdeController,
&gEfiPciIoProtocolGuid,
IdeController,
&gEfiPciIoProtocolGuid,
(VOID **)&PciIo
);
if (EFI_ERROR (Status)) {

68
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c
View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -150,7 +150,7 @@ EFI_STATUS
RomShadow (
IN EFI_HANDLE PciHandle,
IN UINT32 ShadowAddress,
IN UINT32 ShadowedSize,
IN UINT32 ShadowedSize,
IN UINT8 DiskStart,
IN UINT8 DiskEnd
)
@@ -258,7 +258,7 @@ IsLegacyRom (
}
/**
Find the PC-AT ROM Image in the raw PCI Option ROM. Also return the
Find the PC-AT ROM Image in the raw PCI Option ROM. Also return the
related information from the header.
@param Csm16Revision The PCI interface version of underlying CSM16
@@ -321,7 +321,7 @@ GetPciLegacyRom (
if (((UINTN)RomHeader.Raw - (UINTN)*Rom) + Pcir->ImageLength * 512 > *ImageSize) {
break;
}
if (Pcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
Match = FALSE;
if (Pcir->VendorId == VendorId) {
@@ -384,7 +384,7 @@ GetPciLegacyRom (
DEBUG ((EFI_D_ERROR, "GetPciLegacyRom - OpRom not match (%04x-%04x)\n", (UINTN)VendorId, (UINTN)DeviceId));
}
}
if ((Pcir->Indicator & 0x80) == 0x80) {
break;
} else {
@@ -415,7 +415,7 @@ GetPciLegacyRom (
}
if (OpRomRevision != NULL) {
//
//
// Optional return PCI Data Structure revision
//
if (Pcir->Length >= 0x1C) {
@@ -815,7 +815,7 @@ CopyPirqTable (
//
Regs.X.BX = (UINT16) 0x1;
//
// 16-byte boundary alignment requirement according to
// 16-byte boundary alignment requirement according to
// PCI IRQ Routing Table Specification
//
Regs.X.DX = 0x10;
@@ -832,7 +832,7 @@ CopyPirqTable (
if (Regs.X.AX != 0) {
DEBUG ((EFI_D_ERROR, "PIRQ table length insufficient - %x\n", PirqTableSize));
} else {
DEBUG ((EFI_D_INFO, "PIRQ table in legacy region - %x\n", Private->Legacy16Table->IrqRoutingTablePointer));
DEBUG ((EFI_D_INFO, "PIRQ table in legacy region - %x\n", Private->Legacy16Table->IrqRoutingTablePointer));
Private->Legacy16Table->IrqRoutingTableLength = (UINT32)PirqTableSize;
CopyMem (
(VOID *) (UINTN)Private->Legacy16Table->IrqRoutingTablePointer,
@@ -1595,11 +1595,11 @@ PciShadowRoms (
&HandleBuffer,
&HandleCount,
NULL
);
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
VgaHandle = HandleBuffer[0];
Status = gBS->LocateHandleBuffer (
@@ -1699,13 +1699,13 @@ PciShadowRoms (
sizeof (Pci) / sizeof (UINT32),
&Pci
);
//
// Only one Video OPROM can be given control in BIOS phase. If there are multiple Video devices,
// one will work in legacy mode (OPROM will be given control) and
// Only one Video OPROM can be given control in BIOS phase. If there are multiple Video devices,
// one will work in legacy mode (OPROM will be given control) and
// other Video devices will work in native mode (OS driver will handle these devices).
//
if (IS_PCI_DISPLAY (&Pci) && Index != 0) {
//
if (IS_PCI_DISPLAY (&Pci) && Index != 0) {
continue;
}
//
@@ -1715,11 +1715,11 @@ PciShadowRoms (
if (!EFI_ERROR (Status)) {
continue;
}
//
// If legacy VBIOS Oprom has not been dispatched before, install legacy VBIOS here.
//
if (IS_PCI_DISPLAY (&Pci) && Index == 0) {
if (IS_PCI_DISPLAY (&Pci) && Index == 0) {
Status = LegacyBiosInstallVgaRom (Private);
//
// A return status of EFI_NOT_FOUND is considered valid (No EFI
@@ -2104,7 +2104,7 @@ LegacyBiosInstallVgaRom (
if (EFI_ERROR (Status)) {
return Status;
}
for (Index = 0; Index < EntryCount; Index++) {
if ((OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) != 0) {
Status = gBS->HandleProtocol (
@@ -2123,7 +2123,7 @@ LegacyBiosInstallVgaRom (
}
}
}
//
// Kick off the native EFI driver
//
@@ -2305,7 +2305,7 @@ LegacyBiosInstallRom (
MaxRomAddr = PcdGet32 (PcdEndOpromShadowAddress);
if ((Private->Legacy16Table->TableLength >= OFFSET_OF(EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&
(Private->Legacy16Table->UmaAddress != 0) &&
(Private->Legacy16Table->UmaAddress != 0) &&
(Private->Legacy16Table->UmaSize != 0) &&
(MaxRomAddr > (Private->Legacy16Table->UmaAddress))) {
MaxRomAddr = Private->Legacy16Table->UmaAddress;
@@ -2326,7 +2326,7 @@ LegacyBiosInstallRom (
EFI_SIZE_TO_PAGES (ImageSize),
&PhysicalAddress
);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));
//
@@ -2389,7 +2389,7 @@ LegacyBiosInstallRom (
(UINT32) ImageSize,
&Granularity
);
DEBUG ((EFI_D_INFO, " Shadowing OpROM init/runtime/isize = %x/%x/%x\n", InitAddress, RuntimeAddress, ImageSize));
CopyMem ((VOID *) InitAddress, RomImage, ImageSize);
@@ -2466,7 +2466,7 @@ LegacyBiosInstallRom (
//
gRT->GetTime (&BootTime, NULL);
LocalTime = BootTime.Hour * 3600 + BootTime.Minute * 60 + BootTime.Second;
//
// Multiply result by 18.2 for number of ticks since midnight.
// Use 182/10 to avoid floating point math.
@@ -2476,21 +2476,21 @@ LegacyBiosInstallRom (
BdaPtr = (UINT32 *) ((UINTN) 0x46C);
*BdaPtr = LocalTime;
);
//
// Pass in handoff data
//
PciEnableStatus = EFI_UNSUPPORTED;
ZeroMem (&Regs, sizeof (Regs));
if (PciHandle != NULL) {
Status = gBS->HandleProtocol (
PciHandle,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
);
ASSERT_EFI_ERROR (Status);
//
// Enable command register.
//
@@ -2500,7 +2500,7 @@ LegacyBiosInstallRom (
EFI_PCI_DEVICE_ENABLE,
NULL
);
PciIo->GetLocation (
PciIo,
&Segment,
@@ -2510,10 +2510,10 @@ LegacyBiosInstallRom (
);
DEBUG ((EFI_D_INFO, "Shadowing OpROM on the PCI device %x/%x/%x\n", Bus, Device, Function));
}
mIgnoreBbsUpdateFlag = FALSE;
Regs.X.AX = Legacy16DispatchOprom;
//
// Generate DispatchOpRomTable data
//
@@ -2545,7 +2545,7 @@ LegacyBiosInstallRom (
} else {
Regs.X.BX = 0;
}
if (Private->IntThunk->DispatchOpromTable.NumberBbsEntries != (UINT8) Private->IntThunk->EfiToLegacy16BootTable.NumberBbsEntries) {
Private->IntThunk->EfiToLegacy16BootTable.NumberBbsEntries = (UINT8) Private->IntThunk->DispatchOpromTable.NumberBbsEntries;
mIgnoreBbsUpdateFlag = TRUE;
@@ -2618,7 +2618,7 @@ LegacyBiosInstallRom (
ACCESS_PAGE0_CODE (
LocalDiskEnd = (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80);
);
//
// Allow platform to perform any required actions after the
// OPROM has been initialized.
@@ -2687,7 +2687,7 @@ LegacyBiosInstallRom (
Private->OptionRom = (UINT32) (RuntimeAddress + *RuntimeImageLength);
Status = EFI_SUCCESS;
Done:
if (PhysicalAddress != 0) {
//
@@ -2879,7 +2879,7 @@ LegacyBiosInstallPciRom (
*Flags = 0;
if ((PciHandle != NULL) && (RomImage == NULL)) {
//
// If PciHandle has OpRom to Execute
// If PciHandle has OpRom to Execute
// and OpRom are all associated with Hardware
//
Status = gBS->HandleProtocol (
@@ -3025,7 +3025,7 @@ LegacyBiosInstallPciRom (
mVgaInstallationInProgress = FALSE;
return EFI_UNSUPPORTED;
}
Pcir = (PCI_3_0_DATA_STRUCTURE *)
((UINT8 *) LocalRomImage + ((PCI_EXPANSION_ROM_HEADER *) LocalRomImage)->PcirOffset);

40
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
View File

@@ -1,7 +1,7 @@
/** @file
Call into 16-bit BIOS code, Use AsmThunk16 function of BaseLib.
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -77,7 +77,7 @@ LegacyBiosInt86 (
Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
Offset = (UINT16)((UINT32 *)0)[BiosInt];
);
return InternalLegacyBiosFarCall (
This,
Segment,
@@ -131,7 +131,7 @@ LegacyBiosFarCall86 (
}
/**
Provide NULL interrupt handler which is used to check
Provide NULL interrupt handler which is used to check
if there is more than one HW interrupt registers with the CPU AP.
@param InterruptType - The type of interrupt that occured
@@ -218,7 +218,7 @@ InternalLegacyBiosFarCall (
// Disable DXE Timer while executing in real mode
//
Private->Timer->SetTimerPeriod (Private->Timer, 0);
//
// Save and disable interrupt of debug timer
//
@@ -231,14 +231,14 @@ InternalLegacyBiosFarCall (
//
// Check to see if there is more than one HW interrupt registers with the CPU AP.
// If there is, then ASSERT() since that is not compatible with the CSM because
// interupts other than the Timer interrupt that was disabled above can not be
// If there is, then ASSERT() since that is not compatible with the CSM because
// interupts other than the Timer interrupt that was disabled above can not be
// handled properly from real mode.
//
DEBUG_CODE (
UINTN Vector;
UINTN Count;
for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
if (Status == EFI_ALREADY_STARTED) {
@@ -255,14 +255,14 @@ InternalLegacyBiosFarCall (
);
//
// If the Timer AP has enabled the 8254 timer IRQ and the current 8254 timer
// period is less than the CSM required rate of 54.9254, then force the 8254
// If the Timer AP has enabled the 8254 timer IRQ and the current 8254 timer
// period is less than the CSM required rate of 54.9254, then force the 8254
// PIT counter to 0, which is the CSM required rate of 54.9254 ms
//
if (Private->TimerUses8254 && TimerPeriod < 549254) {
SetPitCount (0);
}
if (Stack != NULL && StackSize != 0) {
//
// Copy Stack to low memory stack
@@ -310,7 +310,7 @@ InternalLegacyBiosFarCall (
// End critical section
//
gBS->RestoreTPL (OriginalTpl);
//
// OPROM may allocate EBDA range by itself and change EBDA base and EBDA size.
// Get the current EBDA base address, and compared with pre-allocate minimum
@@ -385,27 +385,27 @@ LegacyBiosInitializeThunk (
TimerVector = 0;
Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
ASSERT_EFI_ERROR (Status);
//
// Check to see if the Timer AP has hooked the IRQ0 from the 8254 PIT
//
//
Status = Private->Cpu->RegisterInterruptHandler (
Private->Cpu,
TimerVector,
Private->Cpu,
TimerVector,
LegacyBiosNullInterruptHandler
);
if (Status == EFI_SUCCESS) {
//
// If the Timer AP has not enabled the 8254 timer IRQ, then force the 8254 PIT
// If the Timer AP has not enabled the 8254 timer IRQ, then force the 8254 PIT
// counter to 0, which is the CSM required rate of 54.9254 ms
//
Private->Cpu->RegisterInterruptHandler (
Private->Cpu,
TimerVector,
Private->Cpu,
TimerVector,
NULL
);
SetPitCount (0);
//
// Save status that the Timer AP is not using the 8254 PIT
//
@@ -421,6 +421,6 @@ LegacyBiosInitializeThunk (
//
ASSERT (FALSE);
}
return EFI_SUCCESS;
}