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UefiPayloadPkg: Add support for Firmware Volume Block Protocol

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This adds support for FVB in order to support a platform independent
and non-volatile variable store on UefiPayloadPkg. It is required for
non-volatile variable support, TPM support, Secureboot support and more.

Since commit bc744f5893fc4d53275ed26dd8d968011c6a09c1 coreboot supports
the SMMSTORE v2 feature. It implements a SMI handler that is able to
write, read and erase pages in the boot media (SPI flash).
The communication is done using a fixed communication buffer that is
allocated in CBMEM. The existence of this optional feature is advertised
by a coreboot table.
When the SMMSTORE feature is not available the variable emulation is used
by setting PcdEmuVariableNvModeEnable to TRUE.

Add a library for SMMStore to be used in DXE.

The DXE component provides runtime services and takes care of virtual to
physical mapping the communication buffers between SMM and OS.

Make use of the APRIORI DXE to initialize an empty store on the first boot
and set the PCDs to sane values before the variable driver is loaded.

Tests on Intel(R) Xeon(R) E-2288G CPU @ 3.70G showed that the SMI isn't
triggered with a probability of 1:40 of all cases when called in a tight
loop. The CPU continues running and the SMI is triggeres asynchronously
a few clock cycles later. coreboot only handels synchronous APM request
and does nothing on asynchronous APM triggers.

As there's no livesign from SMM it's impossible to tell if the handler
has run. Just wait a bit and try again to trigger a synchronous SMI.

Tests confirmed that out of 5 million tries the SMI is now always handled.

Tested on Linux and Windows 10 on real hardware.
Currently this cannot be tested on coreboot and qemu as it doesn't support
the SMMSTORE on qemu.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Patrick Rudolph
2020-04-17 15:58:58 +02:00
committed by Tim Crawford
parent d3b38ea28a
commit 0bef9ccd43
20 changed files with 2052 additions and 8 deletions
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13
UefiPayloadPkg/Include/Coreboot.h
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@@ -236,6 +236,19 @@ struct cb_cbmem_tab {
UINT64 cbmem_tab;
};
#define CB_TAG_SMMSTOREV2 0x0039
struct cb_smmstorev2 {
UINT32 tag;
UINT32 size;
UINT32 num_blocks; /* Number of writeable blocks in SMM */
UINT32 block_size; /* Size of a block in byte. Default: 64 KiB */
UINT32 mmap_addr; /* MMIO address of the store for read only access */
UINT32 com_buffer; /* Physical address of the communication buffer */
UINT32 com_buffer_size; /* Size of the communication buffer in byte */
UINT8 apm_cmd; /* The command byte to write to the APM I/O port */
UINT8 unused[3]; /* Set to zero */
};
/* Helpful macros */
#define MEM_RANGE_COUNT(_rec) \