UefiCpuPkg: Add a 16-bit protected mode code segment descriptor
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 A hypervisor is not allowed to update an SEV-ES guests register state, so when booting an SEV-ES guest AP, the hypervisor is not allowed to set the RIP to the guest requested value. Instead, an SEV-ES AP must be transition from 64-bit long mode to 16-bit real mode in response to an INIT-SIPI-SIPI sequence. This requires a 16-bit code segment descriptor. For PEI, create this descriptor in the reset vector GDT table. For DXE, create this descriptor from the newly reserved entry at location 0x28. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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@@ -36,7 +36,7 @@ struct _GDT_ENTRIES {
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GDT_ENTRY LinearCode;
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GDT_ENTRY SysData;
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GDT_ENTRY SysCode;
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GDT_ENTRY Spare4;
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GDT_ENTRY SysCode16;
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GDT_ENTRY LinearData64;
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GDT_ENTRY LinearCode64;
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GDT_ENTRY Spare5;
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@@ -49,7 +49,7 @@ struct _GDT_ENTRIES {
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#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
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#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
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#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
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#define SPARE4_SEL OFFSET_OF (GDT_ENTRIES, Spare4)
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#define SYS_CODE16_SEL OFFSET_OF (GDT_ENTRIES, SysCode16)
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#define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)
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#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
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#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
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