Arm Packages: Fixed coding style/Line endings to follow EDK2 coding convention
Arm Packages: Fixed mispelling Arm Packages: Reduced warnings all over the code git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12407 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
@@ -1,69 +1,69 @@
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 3
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#global symbols referenced by this module
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GCC_ASM_IMPORT(CEntryPoint)
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StartupAddr: .word CEntryPoint
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#make _ModuleEntryPoint as global
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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# Identify CPU ID
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mrc p15, 0, r0, c0, c0, 5
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and r0, #0xf
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_SetupStack:
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# Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
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mov r3,r0 @ r3 = core_id
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mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base
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add r3,r3,r1 @ r3 = stack_base + offset
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add r3,r3,r2,LSR #1 @ r3 = stack_offset + (stack_size/2) <-- the top half is for the heap
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mov sp, r3
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# Only allocate memory in top of the primary core stack
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cmp r0, #0
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bne _PrepareArguments
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_AllocateGlobalPeiVariables:
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# Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
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sub sp, sp, r1
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_PrepareArguments:
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# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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# move sec startup address into a data register
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# ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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# jump to PrePeiCore C code
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# r0 = core_id
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# r1 = pei_core_address
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blx r2
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 3
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#global symbols referenced by this module
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GCC_ASM_IMPORT(CEntryPoint)
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StartupAddr: .word CEntryPoint
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#make _ModuleEntryPoint as global
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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# Identify CPU ID
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mrc p15, 0, r0, c0, c0, 5
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and r0, #0xf
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_SetupStack:
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# Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
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mov r3,r0 @ r3 = core_id
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mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base
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add r3,r3,r1 @ r3 = stack_base + offset
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add r3,r3,r2,LSR #1 @ r3 = stack_offset + (stack_size/2) <-- the top half is for the heap
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mov sp, r3
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# Only allocate memory in top of the primary core stack
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cmp r0, #0
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bne _PrepareArguments
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_AllocateGlobalPeiVariables:
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# Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
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sub sp, sp, r1
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_PrepareArguments:
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# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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# move sec startup address into a data register
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# ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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# jump to PrePeiCore C code
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# r0 = core_id
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# r1 = pei_core_address
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blx r2
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@@ -44,6 +44,7 @@
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DebugAgentLib
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IoLib
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PrintLib
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SerialPortLib
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[Ppis]
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gEfiTemporaryRamSupportPpiGuid
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@@ -62,6 +63,3 @@
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress
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gArmTokenSpaceGuid.PcdNormalFvSize
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