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ArmPlatformPkg: Replaced 'ArmPlatformTrustzoneSupported' by the fixed Pcd gArmTokenSpaceGuid.PcdTrustzoneSupport

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This change does not make possible to disable Trustzone from the firmware.
The firmware has to be built for Trustzone support enabled or disabled.

The memory page table are now defined as 'Normal Memory' in any case.
Except for RTSM Device Memory which as to be Secure Device Memory due
to a RTSM bug.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12452 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-09-27 16:29:07 +00:00
parent 4103bc94fb
commit 12c5ae238e
12 changed files with 49 additions and 138 deletions
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20
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
View File

@@ -47,26 +47,6 @@ ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
}
};
/**
Return if Trustzone is supported by your platform
A non-zero value must be returned if you want to support a Secure World on your platform.
ArmPlatformTrustzoneInit() will later set up the secure regions.
This function can return 0 even if Trustzone is supported by your processor. In this case,
the platform will continue to run in Secure World.
@return A non-zero value if Trustzone supported.
**/
UINTN
ArmPlatformTrustzoneSupported (
VOID
)
{
// There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM
return FALSE;
}
/**
Remap the memory at 0x0

17
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c
View File

@@ -25,8 +25,6 @@
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK
#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED
/**
Return the Virtual Memory Map of your platform
@@ -44,21 +42,20 @@ ArmPlatformGetVirtualMemoryMap (
)
{
UINT32 CacheAttributes;
BOOLEAN bTrustzoneSupport = FALSE;
UINTN Index = 0;
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
ASSERT(VirtualMemoryMap != NULL);
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages (EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
if (VirtualMemoryTable == NULL) {
return;
}
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);
CacheAttributes = DDR_ATTRIBUTES_CACHED;
} else {
CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
}
// ReMap (Either NOR Flash or DRAM)
@@ -77,13 +74,13 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;
VirtualMemoryTable[Index].Length = ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ;
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;
// SMB CS0-CS1 - NOR Flash 1 & 2
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_NOR_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_NOR_BASE;
VirtualMemoryTable[Index].Length = ARM_EB_SMB_NOR_SZ + ARM_EB_SMB_DOC_SZ;
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;
// SMB CS2 - SRAM
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_SRAM_BASE;
@@ -95,14 +92,14 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].Length = ARM_EB_SMB_PERIPH_SZ;
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;
// If a Logic Tile is connected to The ARM Versatile Express Motherboard
if (MmioRead32(ARM_EB_SYS_PROCID1_REG) != 0) {
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_LOGIC_TILE_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;
VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;
ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
} else {