MdeModulePkg/Xhci: Remove TDs from transfer ring when timeout happens
The error handling for timeout case is enhanced to remove TDs from transfer ring. The original code only removed s/w URB, but the h/w transfer descriptor TDs didn't get removed. It would cause data lost for data stream peripheral, such as usb-to-serial device, from the s/w perspective. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Baraneedharan Anbazhagan <anbazhagan@hp.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18313 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
@@ -645,12 +645,8 @@ XhcRecoverHaltedEndpoint (
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)
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{
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EFI_STATUS Status;
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EVT_TRB_COMMAND_COMPLETION *EvtTrb;
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CMD_TRB_RESET_ENDPOINT CmdTrbResetED;
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CMD_SET_TR_DEQ_POINTER CmdSetTRDeq;
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UINT8 Dci;
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UINT8 SlotId;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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Status = EFI_SUCCESS;
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SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
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@@ -665,17 +661,7 @@ XhcRecoverHaltedEndpoint (
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//
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// 1) Send Reset endpoint command to transit from halt to stop state
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//
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ZeroMem (&CmdTrbResetED, sizeof (CmdTrbResetED));
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CmdTrbResetED.CycleBit = 1;
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CmdTrbResetED.Type = TRB_TYPE_RESET_ENDPOINT;
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CmdTrbResetED.EDID = Dci;
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CmdTrbResetED.SlotId = SlotId;
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Status = XhcCmdTransfer (
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Xhc,
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(TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,
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XHC_GENERIC_TIMEOUT,
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(TRB_TEMPLATE **) (UINTN) &EvtTrb
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);
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Status = XhcResetEndpoint(Xhc, SlotId, Dci);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
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goto Done;
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@@ -684,22 +670,70 @@ XhcRecoverHaltedEndpoint (
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//
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// 2)Set dequeue pointer
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//
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ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
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PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
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CmdSetTRDeq.PtrLo = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;
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CmdSetTRDeq.PtrHi = XHC_HIGH_32BIT (PhyAddr);
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CmdSetTRDeq.CycleBit = 1;
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CmdSetTRDeq.Type = TRB_TYPE_SET_TR_DEQUE;
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CmdSetTRDeq.Endpoint = Dci;
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CmdSetTRDeq.SlotId = SlotId;
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Status = XhcCmdTransfer (
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Xhc,
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(TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,
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XHC_GENERIC_TIMEOUT,
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(TRB_TEMPLATE **) (UINTN) &EvtTrb
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);
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Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Set Dequeue Pointer Failed, Status = %r\n", Status));
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DEBUG ((EFI_D_ERROR, "XhcRecoverHaltedEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
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goto Done;
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}
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//
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// 3)Ring the doorbell to transit from stop to active
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//
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XhcRingDoorBell (Xhc, SlotId, Dci);
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Done:
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return Status;
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}
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/**
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System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
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Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
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the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
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state.
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@param Xhc The XHCI Instance.
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@param Urb The urb which doesn't get completed in a specified timeout range.
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@retval EFI_SUCCESS The dequeuing of the TDs is successful.
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@retval Others Failed to stop the endpoint and dequeue the TDs.
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**/
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EFI_STATUS
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EFIAPI
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XhcDequeueTrbFromEndpoint (
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IN USB_XHCI_INSTANCE *Xhc,
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IN URB *Urb
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)
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{
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EFI_STATUS Status;
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UINT8 Dci;
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UINT8 SlotId;
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Status = EFI_SUCCESS;
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SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
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if (SlotId == 0) {
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return EFI_DEVICE_ERROR;
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}
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Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
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ASSERT (Dci < 32);
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DEBUG ((EFI_D_INFO, "Stop Slot = %x,Dci = %x\n", SlotId, Dci));
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//
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// 1) Send Stop endpoint command to stop xHC from executing of the TDs on the endpoint
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//
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Status = XhcStopEndpoint(Xhc, SlotId, Dci);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
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goto Done;
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}
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//
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// 2)Set dequeue pointer
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//
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Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
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goto Done;
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}
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@@ -3061,6 +3095,105 @@ XhcStopEndpoint (
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return Status;
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}
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/**
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Reset endpoint through XHCI's Reset_Endpoint cmd.
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@param Xhc The XHCI Instance.
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@param SlotId The slot id to be configured.
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@param Dci The device context index of endpoint.
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@retval EFI_SUCCESS Reset endpoint successfully.
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@retval Others Failed to reset endpoint.
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**/
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EFI_STATUS
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EFIAPI
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XhcResetEndpoint (
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT8 SlotId,
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IN UINT8 Dci
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)
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{
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EFI_STATUS Status;
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EVT_TRB_COMMAND_COMPLETION *EvtTrb;
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CMD_TRB_RESET_ENDPOINT CmdTrbResetED;
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DEBUG ((EFI_D_INFO, "XhcResetEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));
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//
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// Send stop endpoint command to transit Endpoint from running to stop state
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//
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ZeroMem (&CmdTrbResetED, sizeof (CmdTrbResetED));
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CmdTrbResetED.CycleBit = 1;
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CmdTrbResetED.Type = TRB_TYPE_RESET_ENDPOINT;
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CmdTrbResetED.EDID = Dci;
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CmdTrbResetED.SlotId = SlotId;
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Status = XhcCmdTransfer (
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Xhc,
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(TRB_TEMPLATE *) (UINTN) &CmdTrbResetED,
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XHC_GENERIC_TIMEOUT,
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(TRB_TEMPLATE **) (UINTN) &EvtTrb
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);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcResetEndpoint: Reset Endpoint Failed, Status = %r\n", Status));
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}
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return Status;
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}
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/**
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Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
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@param Xhc The XHCI Instance.
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@param SlotId The slot id to be configured.
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@param Dci The device context index of endpoint.
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@param Urb The dequeue pointer of the transfer ring specified
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by the urb to be updated.
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@retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
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@retval Others Failed to set transfer ring dequeue pointer.
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**/
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EFI_STATUS
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EFIAPI
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XhcSetTrDequeuePointer (
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IN USB_XHCI_INSTANCE *Xhc,
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IN UINT8 SlotId,
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IN UINT8 Dci,
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IN URB *Urb
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)
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{
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EFI_STATUS Status;
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EVT_TRB_COMMAND_COMPLETION *EvtTrb;
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CMD_SET_TR_DEQ_POINTER CmdSetTRDeq;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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DEBUG ((EFI_D_INFO, "XhcSetTrDequeuePointer: Slot = 0x%x, Dci = 0x%x, Urb = 0x%x\n", SlotId, Dci, Urb));
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//
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// Send stop endpoint command to transit Endpoint from running to stop state
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//
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ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
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PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER));
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CmdSetTRDeq.PtrLo = XHC_LOW_32BIT (PhyAddr) | Urb->Ring->RingPCS;
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CmdSetTRDeq.PtrHi = XHC_HIGH_32BIT (PhyAddr);
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CmdSetTRDeq.CycleBit = 1;
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CmdSetTRDeq.Type = TRB_TYPE_SET_TR_DEQUE;
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CmdSetTRDeq.Endpoint = Dci;
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CmdSetTRDeq.SlotId = SlotId;
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Status = XhcCmdTransfer (
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Xhc,
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(TRB_TEMPLATE *) (UINTN) &CmdSetTRDeq,
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XHC_GENERIC_TIMEOUT,
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(TRB_TEMPLATE **) (UINTN) &EvtTrb
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);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "XhcSetTrDequeuePointer: Set TR Dequeue Pointer Failed, Status = %r\n", Status));
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}
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return Status;
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}
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/**
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Set interface through XHCI's Configure_Endpoint cmd.
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