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MdeModulePkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdeModulePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:02 -08:00
committed by mergify[bot]
parent 7c7184e201
commit 1436aea4d5
994 changed files with 107608 additions and 101311 deletions
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1033
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
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File diff suppressed because it is too large Load Diff

408
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
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@@ -5,192 +5,193 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __ATA_HC_AHCI_MODE_H__
#define __ATA_HC_AHCI_MODE_H__
#define EFI_AHCI_BAR_INDEX 0x05
#define EFI_AHCI_BAR_INDEX 0x05
#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
#define EFI_AHCI_CAP_SAM BIT18
#define EFI_AHCI_CAP_SSS BIT27
#define EFI_AHCI_CAP_S64A BIT31
#define EFI_AHCI_GHC_OFFSET 0x0004
#define EFI_AHCI_GHC_RESET BIT0
#define EFI_AHCI_GHC_IE BIT1
#define EFI_AHCI_GHC_ENABLE BIT31
#define EFI_AHCI_IS_OFFSET 0x0008
#define EFI_AHCI_PI_OFFSET 0x000C
#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
#define EFI_AHCI_CAP_SAM BIT18
#define EFI_AHCI_CAP_SSS BIT27
#define EFI_AHCI_CAP_S64A BIT31
#define EFI_AHCI_GHC_OFFSET 0x0004
#define EFI_AHCI_GHC_RESET BIT0
#define EFI_AHCI_GHC_IE BIT1
#define EFI_AHCI_GHC_ENABLE BIT31
#define EFI_AHCI_IS_OFFSET 0x0008
#define EFI_AHCI_PI_OFFSET 0x000C
#define EFI_AHCI_MAX_PORTS 32
#define EFI_AHCI_MAX_PORTS 32
#define AHCI_CAPABILITY2_OFFSET 0x0024
#define AHCI_CAP2_SDS BIT3
#define AHCI_CAP2_SADM BIT4
#define AHCI_CAPABILITY2_OFFSET 0x0024
#define AHCI_CAP2_SDS BIT3
#define AHCI_CAP2_SADM BIT4
typedef struct {
UINT32 Lower32;
UINT32 Upper32;
UINT32 Lower32;
UINT32 Upper32;
} DATA_32;
typedef union {
DATA_32 Uint32;
UINT64 Uint64;
DATA_32 Uint32;
UINT64 Uint64;
} DATA_64;
//
// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
// Add a bit of margin for robustness.
//
#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
//
// Refer SATA1.0a spec, the FIS enable time should be less than 500ms.
//
#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)
#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)
//
// Refer SATA1.0a spec, the bus reset time should be less than 1s.
//
#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)
#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)
#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000
#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000
#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000
#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000
#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000
#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000
#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000
#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000
//
// Each PRDT entry can point to a memory block up to 4M byte
//
#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000
#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000
#define EFI_AHCI_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device
#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20
#define EFI_AHCI_FIS_REGISTER_D2H 0x34 //Register FIS - Device to Host
#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20
#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39 //DMA Activate FIS - Device to Host
#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4
#define EFI_AHCI_FIS_DMA_SETUP 0x41 //DMA Setup FIS - Bi-directional
#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28
#define EFI_AHCI_FIS_DATA 0x46 //Data FIS - Bi-directional
#define EFI_AHCI_FIS_BIST 0x58 //BIST Activate FIS - Bi-directional
#define EFI_AHCI_FIS_BIST_LENGTH 12
#define EFI_AHCI_FIS_PIO_SETUP 0x5F //PIO Setup FIS - Device to Host
#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20
#define EFI_AHCI_FIS_SET_DEVICE 0xA1 //Set Device Bits FIS - Device to Host
#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8
#define EFI_AHCI_FIS_REGISTER_H2D 0x27 // Register FIS - Host to Device
#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20
#define EFI_AHCI_FIS_REGISTER_D2H 0x34 // Register FIS - Device to Host
#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20
#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39 // DMA Activate FIS - Device to Host
#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4
#define EFI_AHCI_FIS_DMA_SETUP 0x41 // DMA Setup FIS - Bi-directional
#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28
#define EFI_AHCI_FIS_DATA 0x46 // Data FIS - Bi-directional
#define EFI_AHCI_FIS_BIST 0x58 // BIST Activate FIS - Bi-directional
#define EFI_AHCI_FIS_BIST_LENGTH 12
#define EFI_AHCI_FIS_PIO_SETUP 0x5F // PIO Setup FIS - Device to Host
#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20
#define EFI_AHCI_FIS_SET_DEVICE 0xA1 // Set Device Bits FIS - Device to Host
#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8
#define EFI_AHCI_D2H_FIS_OFFSET 0x40
#define EFI_AHCI_DMA_FIS_OFFSET 0x00
#define EFI_AHCI_PIO_FIS_OFFSET 0x20
#define EFI_AHCI_SDB_FIS_OFFSET 0x58
#define EFI_AHCI_FIS_TYPE_MASK 0xFF
#define EFI_AHCI_U_FIS_OFFSET 0x60
#define EFI_AHCI_D2H_FIS_OFFSET 0x40
#define EFI_AHCI_DMA_FIS_OFFSET 0x00
#define EFI_AHCI_PIO_FIS_OFFSET 0x20
#define EFI_AHCI_SDB_FIS_OFFSET 0x58
#define EFI_AHCI_FIS_TYPE_MASK 0xFF
#define EFI_AHCI_U_FIS_OFFSET 0x60
//
// Port register
//
#define EFI_AHCI_PORT_START 0x0100
#define EFI_AHCI_PORT_REG_WIDTH 0x0080
#define EFI_AHCI_PORT_CLB 0x0000
#define EFI_AHCI_PORT_CLBU 0x0004
#define EFI_AHCI_PORT_FB 0x0008
#define EFI_AHCI_PORT_FBU 0x000C
#define EFI_AHCI_PORT_IS 0x0010
#define EFI_AHCI_PORT_IS_DHRS BIT0
#define EFI_AHCI_PORT_IS_PSS BIT1
#define EFI_AHCI_PORT_IS_DSS BIT2
#define EFI_AHCI_PORT_IS_SDBS BIT3
#define EFI_AHCI_PORT_IS_UFS BIT4
#define EFI_AHCI_PORT_IS_DPS BIT5
#define EFI_AHCI_PORT_IS_PCS BIT6
#define EFI_AHCI_PORT_IS_DIS BIT7
#define EFI_AHCI_PORT_IS_PRCS BIT22
#define EFI_AHCI_PORT_IS_IPMS BIT23
#define EFI_AHCI_PORT_IS_OFS BIT24
#define EFI_AHCI_PORT_IS_INFS BIT26
#define EFI_AHCI_PORT_IS_IFS BIT27
#define EFI_AHCI_PORT_IS_HBDS BIT28
#define EFI_AHCI_PORT_IS_HBFS BIT29
#define EFI_AHCI_PORT_IS_TFES BIT30
#define EFI_AHCI_PORT_IS_CPDS BIT31
#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF
#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F
#define EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS | EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
#define EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
#define EFI_AHCI_PORT_START 0x0100
#define EFI_AHCI_PORT_REG_WIDTH 0x0080
#define EFI_AHCI_PORT_CLB 0x0000
#define EFI_AHCI_PORT_CLBU 0x0004
#define EFI_AHCI_PORT_FB 0x0008
#define EFI_AHCI_PORT_FBU 0x000C
#define EFI_AHCI_PORT_IS 0x0010
#define EFI_AHCI_PORT_IS_DHRS BIT0
#define EFI_AHCI_PORT_IS_PSS BIT1
#define EFI_AHCI_PORT_IS_DSS BIT2
#define EFI_AHCI_PORT_IS_SDBS BIT3
#define EFI_AHCI_PORT_IS_UFS BIT4
#define EFI_AHCI_PORT_IS_DPS BIT5
#define EFI_AHCI_PORT_IS_PCS BIT6
#define EFI_AHCI_PORT_IS_DIS BIT7
#define EFI_AHCI_PORT_IS_PRCS BIT22
#define EFI_AHCI_PORT_IS_IPMS BIT23
#define EFI_AHCI_PORT_IS_OFS BIT24
#define EFI_AHCI_PORT_IS_INFS BIT26
#define EFI_AHCI_PORT_IS_IFS BIT27
#define EFI_AHCI_PORT_IS_HBDS BIT28
#define EFI_AHCI_PORT_IS_HBFS BIT29
#define EFI_AHCI_PORT_IS_TFES BIT30
#define EFI_AHCI_PORT_IS_CPDS BIT31
#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF
#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F
#define EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS | EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
#define EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)
#define EFI_AHCI_PORT_IE 0x0014
#define EFI_AHCI_PORT_CMD 0x0018
#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE
#define EFI_AHCI_PORT_CMD_ST BIT0
#define EFI_AHCI_PORT_CMD_SUD BIT1
#define EFI_AHCI_PORT_CMD_POD BIT2
#define EFI_AHCI_PORT_CMD_CLO BIT3
#define EFI_AHCI_PORT_CMD_FRE BIT4
#define EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 | BIT9 | BIT10 | BIT11 | BIT12)
#define EFI_AHCI_PORT_CMD_CCS_SHIFT 8
#define EFI_AHCI_PORT_CMD_FR BIT14
#define EFI_AHCI_PORT_CMD_CR BIT15
#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL)
#define EFI_AHCI_PORT_CMD_PMA BIT17
#define EFI_AHCI_PORT_CMD_HPCP BIT18
#define EFI_AHCI_PORT_CMD_MPSP BIT19
#define EFI_AHCI_PORT_CMD_CPD BIT20
#define EFI_AHCI_PORT_CMD_ESP BIT21
#define EFI_AHCI_PORT_CMD_ATAPI BIT24
#define EFI_AHCI_PORT_CMD_DLAE BIT25
#define EFI_AHCI_PORT_CMD_ALPE BIT26
#define EFI_AHCI_PORT_CMD_ASP BIT27
#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )
#define EFI_AHCI_PORT_TFD 0x0020
#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
#define EFI_AHCI_PORT_TFD_BSY BIT7
#define EFI_AHCI_PORT_TFD_DRQ BIT3
#define EFI_AHCI_PORT_TFD_ERR BIT0
#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00
#define EFI_AHCI_PORT_SIG 0x0024
#define EFI_AHCI_PORT_SSTS 0x0028
#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F
#define EFI_AHCI_PORT_SSTS_DET 0x0001
#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003
#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0
#define EFI_AHCI_PORT_SCTL 0x002C
#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F
#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)
#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001
#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003
#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0
#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00
#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300
#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100
#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200
#define EFI_AHCI_PORT_SERR 0x0030
#define EFI_AHCI_PORT_SERR_RDIE BIT0
#define EFI_AHCI_PORT_SERR_RCE BIT1
#define EFI_AHCI_PORT_SERR_TDIE BIT8
#define EFI_AHCI_PORT_SERR_PCDIE BIT9
#define EFI_AHCI_PORT_SERR_PE BIT10
#define EFI_AHCI_PORT_SERR_IE BIT11
#define EFI_AHCI_PORT_SERR_PRC BIT16
#define EFI_AHCI_PORT_SERR_PIE BIT17
#define EFI_AHCI_PORT_SERR_CW BIT18
#define EFI_AHCI_PORT_SERR_BDE BIT19
#define EFI_AHCI_PORT_SERR_DE BIT20
#define EFI_AHCI_PORT_SERR_CRCE BIT21
#define EFI_AHCI_PORT_SERR_HE BIT22
#define EFI_AHCI_PORT_SERR_LSE BIT23
#define EFI_AHCI_PORT_SERR_TSTE BIT24
#define EFI_AHCI_PORT_SERR_UFT BIT25
#define EFI_AHCI_PORT_SERR_EX BIT26
#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF
#define EFI_AHCI_PORT_SACT 0x0034
#define EFI_AHCI_PORT_CI 0x0038
#define EFI_AHCI_PORT_SNTF 0x003C
#define AHCI_PORT_DEVSLP 0x0044
#define AHCI_PORT_DEVSLP_ADSE BIT0
#define AHCI_PORT_DEVSLP_DSP BIT1
#define AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC
#define AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00
#define AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000
#define AHCI_PORT_DEVSLP_DM_MASK 0x1E000000
#define EFI_AHCI_PORT_IE 0x0014
#define EFI_AHCI_PORT_CMD 0x0018
#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE
#define EFI_AHCI_PORT_CMD_ST BIT0
#define EFI_AHCI_PORT_CMD_SUD BIT1
#define EFI_AHCI_PORT_CMD_POD BIT2
#define EFI_AHCI_PORT_CMD_CLO BIT3
#define EFI_AHCI_PORT_CMD_FRE BIT4
#define EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 | BIT9 | BIT10 | BIT11 | BIT12)
#define EFI_AHCI_PORT_CMD_CCS_SHIFT 8
#define EFI_AHCI_PORT_CMD_FR BIT14
#define EFI_AHCI_PORT_CMD_CR BIT15
#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL)
#define EFI_AHCI_PORT_CMD_PMA BIT17
#define EFI_AHCI_PORT_CMD_HPCP BIT18
#define EFI_AHCI_PORT_CMD_MPSP BIT19
#define EFI_AHCI_PORT_CMD_CPD BIT20
#define EFI_AHCI_PORT_CMD_ESP BIT21
#define EFI_AHCI_PORT_CMD_ATAPI BIT24
#define EFI_AHCI_PORT_CMD_DLAE BIT25
#define EFI_AHCI_PORT_CMD_ALPE BIT26
#define EFI_AHCI_PORT_CMD_ASP BIT27
#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)
#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )
#define EFI_AHCI_PORT_TFD 0x0020
#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)
#define EFI_AHCI_PORT_TFD_BSY BIT7
#define EFI_AHCI_PORT_TFD_DRQ BIT3
#define EFI_AHCI_PORT_TFD_ERR BIT0
#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00
#define EFI_AHCI_PORT_SIG 0x0024
#define EFI_AHCI_PORT_SSTS 0x0028
#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F
#define EFI_AHCI_PORT_SSTS_DET 0x0001
#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003
#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0
#define EFI_AHCI_PORT_SCTL 0x002C
#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F
#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)
#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001
#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003
#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0
#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00
#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300
#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100
#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200
#define EFI_AHCI_PORT_SERR 0x0030
#define EFI_AHCI_PORT_SERR_RDIE BIT0
#define EFI_AHCI_PORT_SERR_RCE BIT1
#define EFI_AHCI_PORT_SERR_TDIE BIT8
#define EFI_AHCI_PORT_SERR_PCDIE BIT9
#define EFI_AHCI_PORT_SERR_PE BIT10
#define EFI_AHCI_PORT_SERR_IE BIT11
#define EFI_AHCI_PORT_SERR_PRC BIT16
#define EFI_AHCI_PORT_SERR_PIE BIT17
#define EFI_AHCI_PORT_SERR_CW BIT18
#define EFI_AHCI_PORT_SERR_BDE BIT19
#define EFI_AHCI_PORT_SERR_DE BIT20
#define EFI_AHCI_PORT_SERR_CRCE BIT21
#define EFI_AHCI_PORT_SERR_HE BIT22
#define EFI_AHCI_PORT_SERR_LSE BIT23
#define EFI_AHCI_PORT_SERR_TSTE BIT24
#define EFI_AHCI_PORT_SERR_UFT BIT25
#define EFI_AHCI_PORT_SERR_EX BIT26
#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF
#define EFI_AHCI_PORT_SACT 0x0034
#define EFI_AHCI_PORT_CI 0x0038
#define EFI_AHCI_PORT_SNTF 0x003C
#define AHCI_PORT_DEVSLP 0x0044
#define AHCI_PORT_DEVSLP_ADSE BIT0
#define AHCI_PORT_DEVSLP_DSP BIT1
#define AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC
#define AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00
#define AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000
#define AHCI_PORT_DEVSLP_DM_MASK 0x1E000000
#define AHCI_COMMAND_RETRIES 5
@@ -200,20 +201,20 @@ typedef union {
// The entry data structure is listed at the following.
//
typedef struct {
UINT32 AhciCmdCfl:5; //Command FIS Length
UINT32 AhciCmdA:1; //ATAPI
UINT32 AhciCmdW:1; //Write
UINT32 AhciCmdP:1; //Prefetchable
UINT32 AhciCmdR:1; //Reset
UINT32 AhciCmdB:1; //BIST
UINT32 AhciCmdC:1; //Clear Busy upon R_OK
UINT32 AhciCmdRsvd:1;
UINT32 AhciCmdPmp:4; //Port Multiplier Port
UINT32 AhciCmdPrdtl:16; //Physical Region Descriptor Table Length
UINT32 AhciCmdPrdbc; //Physical Region Descriptor Byte Count
UINT32 AhciCmdCtba; //Command Table Descriptor Base Address
UINT32 AhciCmdCtbau; //Command Table Descriptor Base Address Upper 32-BITs
UINT32 AhciCmdRsvd1[4];
UINT32 AhciCmdCfl : 5; // Command FIS Length
UINT32 AhciCmdA : 1; // ATAPI
UINT32 AhciCmdW : 1; // Write
UINT32 AhciCmdP : 1; // Prefetchable
UINT32 AhciCmdR : 1; // Reset
UINT32 AhciCmdB : 1; // BIST
UINT32 AhciCmdC : 1; // Clear Busy upon R_OK
UINT32 AhciCmdRsvd : 1;
UINT32 AhciCmdPmp : 4; // Port Multiplier Port
UINT32 AhciCmdPrdtl : 16; // Physical Region Descriptor Table Length
UINT32 AhciCmdPrdbc; // Physical Region Descriptor Byte Count
UINT32 AhciCmdCtba; // Command Table Descriptor Base Address
UINT32 AhciCmdCtbau; // Command Table Descriptor Base Address Upper 32-BITs
UINT32 AhciCmdRsvd1[4];
} EFI_AHCI_COMMAND_LIST;
//
@@ -223,11 +224,11 @@ typedef struct {
//
typedef struct {
UINT8 AhciCFisType;
UINT8 AhciCFisPmNum:4;
UINT8 AhciCFisRsvd:1;
UINT8 AhciCFisRsvd1:1;
UINT8 AhciCFisRsvd2:1;
UINT8 AhciCFisCmdInd:1;
UINT8 AhciCFisPmNum : 4;
UINT8 AhciCFisRsvd : 1;
UINT8 AhciCFisRsvd1 : 1;
UINT8 AhciCFisRsvd2 : 1;
UINT8 AhciCFisCmdInd : 1;
UINT8 AhciCFisCmd;
UINT8 AhciCFisFeature;
UINT8 AhciCFisSecNum;
@@ -266,12 +267,12 @@ typedef struct {
// list entry for this command slot.
//
typedef struct {
UINT32 AhciPrdtDba; //Data Base Address
UINT32 AhciPrdtDbau; //Data Base Address Upper 32-BITs
UINT32 AhciPrdtRsvd;
UINT32 AhciPrdtDbc:22; //Data Byte Count
UINT32 AhciPrdtRsvd1:9;
UINT32 AhciPrdtIoc:1; //Interrupt on Completion
UINT32 AhciPrdtDba; // Data Base Address
UINT32 AhciPrdtDbau; // Data Base Address Upper 32-BITs
UINT32 AhciPrdtRsvd;
UINT32 AhciPrdtDbc : 22; // Data Byte Count
UINT32 AhciPrdtRsvd1 : 9;
UINT32 AhciPrdtIoc : 1; // Interrupt on Completion
} EFI_AHCI_COMMAND_PRDT;
//
@@ -288,24 +289,24 @@ typedef struct {
// Received FIS structure
//
typedef struct {
UINT8 AhciDmaSetupFis[0x1C]; // Dma Setup Fis: offset 0x00
UINT8 AhciDmaSetupFisRsvd[0x04];
UINT8 AhciPioSetupFis[0x14]; // Pio Setup Fis: offset 0x20
UINT8 AhciPioSetupFisRsvd[0x0C];
UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40
UINT8 AhciD2HRegisterFisRsvd[0x04];
UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58
UINT8 AhciUnknownFis[0x40]; // Unknown Fis: offset 0x60
UINT8 AhciUnknownFisRsvd[0x60];
UINT8 AhciDmaSetupFis[0x1C]; // Dma Setup Fis: offset 0x00
UINT8 AhciDmaSetupFisRsvd[0x04];
UINT8 AhciPioSetupFis[0x14]; // Pio Setup Fis: offset 0x20
UINT8 AhciPioSetupFisRsvd[0x0C];
UINT8 AhciD2HRegisterFis[0x14]; // D2H Register Fis: offset 0x40
UINT8 AhciD2HRegisterFisRsvd[0x04];
UINT64 AhciSetDeviceBitsFis; // Set Device Bits Fix: offset 0x58
UINT8 AhciUnknownFis[0x40]; // Unknown Fis: offset 0x60
UINT8 AhciUnknownFisRsvd[0x60];
} EFI_AHCI_RECEIVED_FIS;
typedef struct {
UINT8 Madt : 5;
UINT8 Reserved_5 : 3;
UINT8 Deto;
UINT16 Reserved_16;
UINT32 Reserved_32 : 31;
UINT32 Supported : 1;
UINT8 Madt : 5;
UINT8 Reserved_5 : 3;
UINT8 Deto;
UINT16 Reserved_16;
UINT32 Reserved_32 : 31;
UINT32 Supported : 1;
} DEVSLP_TIMING_VARIABLES;
#pragma pack()
@@ -343,11 +344,11 @@ typedef struct {
EFI_STATUS
EFIAPI
AhciPacketCommandExecute (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
);
/**
@@ -366,10 +367,10 @@ AhciPacketCommandExecute (
EFI_STATUS
EFIAPI
AhciStartCommand (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Port,
IN UINT8 CommandSlot,
IN UINT64 Timeout
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Port,
IN UINT8 CommandSlot,
IN UINT64 Timeout
);
/**
@@ -387,10 +388,9 @@ AhciStartCommand (
EFI_STATUS
EFIAPI
AhciStopCommand (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Port,
IN UINT64 Timeout
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT8 Port,
IN UINT64 Timeout
);
#endif

591
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
View File

File diff suppressed because it is too large Load Diff

344
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
View File

@@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __ATA_ATAPI_PASS_THRU_H__
#define __ATA_ATAPI_PASS_THRU_H__
@@ -36,14 +37,14 @@
#include "IdeMode.h"
#include "AhciMode.h"
extern EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2;
extern EFI_DRIVER_BINDING_PROTOCOL gAtaAtapiPassThruDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2;
extern EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
extern EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
#define ATA_ATAPI_PASS_THRU_SIGNATURE SIGNATURE_32 ('a', 'a', 'p', 't')
#define ATA_ATAPI_DEVICE_SIGNATURE SIGNATURE_32 ('a', 'd', 'e', 'v')
#define ATA_ATAPI_PASS_THRU_SIGNATURE SIGNATURE_32 ('a', 'a', 'p', 't')
#define ATA_ATAPI_DEVICE_SIGNATURE SIGNATURE_32 ('a', 'd', 'e', 'v')
#define ATA_NONBLOCKING_TASK_SIGNATURE SIGNATURE_32 ('a', 't', 's', 'k')
typedef struct _ATA_NONBLOCK_TASK ATA_NONBLOCK_TASK;
@@ -66,88 +67,88 @@ typedef enum {
// Ahci mode device info
//
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
UINT32 Signature;
LIST_ENTRY Link;
UINT16 Port;
UINT16 PortMultiplier;
EFI_ATA_DEVICE_TYPE Type;
UINT16 Port;
UINT16 PortMultiplier;
EFI_ATA_DEVICE_TYPE Type;
EFI_IDENTIFY_DATA *IdentifyData;
EFI_IDENTIFY_DATA *IdentifyData;
} EFI_ATA_DEVICE_INFO;
typedef struct {
UINT32 Signature;
UINT32 Signature;
EFI_HANDLE ControllerHandle;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit;
EFI_HANDLE ControllerHandle;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeControllerInit;
EFI_ATA_PASS_THRU_MODE AtaPassThruMode;
EFI_ATA_PASS_THRU_PROTOCOL AtaPassThru;
EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
EFI_ATA_PASS_THRU_MODE AtaPassThruMode;
EFI_ATA_PASS_THRU_PROTOCOL AtaPassThru;
EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode;
EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru;
EFI_ATA_HC_WORK_MODE Mode;
EFI_ATA_HC_WORK_MODE Mode;
EFI_IDE_REGISTERS IdeRegisters[EfiIdeMaxChannel];
EFI_AHCI_REGISTERS AhciRegisters;
EFI_IDE_REGISTERS IdeRegisters[EfiIdeMaxChannel];
EFI_AHCI_REGISTERS AhciRegisters;
//
// The attached device list
//
LIST_ENTRY DeviceList;
UINT64 EnabledPciAttributes;
UINT64 OriginalPciAttributes;
LIST_ENTRY DeviceList;
UINT64 EnabledPciAttributes;
UINT64 OriginalPciAttributes;
//
// For AtaPassThru protocol, using the following bytes to record the previous call in
// GetNextPort()/GetNextDevice().
//
UINT16 PreviousPort;
UINT16 PreviousPortMultiplier;
UINT16 PreviousPort;
UINT16 PreviousPortMultiplier;
//
// For ExtScsiPassThru protocol, using the following bytes to record the previous call in
// GetNextTarget()/GetNextTargetLun().
//
UINT16 PreviousTargetId;
UINT64 PreviousLun;
UINT16 PreviousTargetId;
UINT64 PreviousLun;
//
// For Non-blocking.
//
EFI_EVENT TimerEvent;
LIST_ENTRY NonBlockingTaskList;
EFI_EVENT TimerEvent;
LIST_ENTRY NonBlockingTaskList;
} ATA_ATAPI_PASS_THRU_INSTANCE;
//
// Task for Non-blocking mode.
//
struct _ATA_NONBLOCK_TASK {
UINT32 Signature;
LIST_ENTRY Link;
UINT32 Signature;
LIST_ENTRY Link;
UINT16 Port;
UINT16 PortMultiplier;
EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
BOOLEAN IsStart;
EFI_EVENT Event;
UINT64 RetryTimes;
BOOLEAN InfiniteWait;
VOID *Map; // Pointer to map.
VOID *TableMap; // Pointer to PRD table map.
EFI_ATA_DMA_PRD *MapBaseAddress; // Pointer to range Base address for Map.
UINTN PageCount; // The page numbers used by PCIO freebuffer.
UINT16 Port;
UINT16 PortMultiplier;
EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet;
BOOLEAN IsStart;
EFI_EVENT Event;
UINT64 RetryTimes;
BOOLEAN InfiniteWait;
VOID *Map; // Pointer to map.
VOID *TableMap; // Pointer to PRD table map.
EFI_ATA_DMA_PRD *MapBaseAddress; // Pointer to range Base address for Map.
UINTN PageCount; // The page numbers used by PCIO freebuffer.
};
//
// Timeout value which uses 100ns as a unit.
// It means 3 second span.
//
#define ATA_ATAPI_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
#define ATA_SPINUP_TIMEOUT EFI_TIMER_PERIOD_SECONDS(10)
#define ATA_ATAPI_TIMEOUT EFI_TIMER_PERIOD_SECONDS(3)
#define ATA_SPINUP_TIMEOUT EFI_TIMER_PERIOD_SECONDS(10)
#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
#define IS_ALIGNED(addr, size) (((UINTN) (addr) & (size - 1)) == 0)
#define ATA_PASS_THRU_PRIVATE_DATA_FROM_THIS(a) \
CR (a, \
@@ -295,11 +296,11 @@ AtaAtapiPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
/**
@@ -347,9 +348,9 @@ AtaAtapiPassThruComponentNameGetControllerName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruSupported (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -390,9 +391,9 @@ AtaAtapiPassThruSupported (
EFI_STATUS
EFIAPI
AtaAtapiPassThruStart (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
@@ -424,10 +425,10 @@ AtaAtapiPassThruStart (
EFI_STATUS
EFIAPI
AtaAtapiPassThruStop (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
);
/**
@@ -446,9 +447,9 @@ LIST_ENTRY *
EFIAPI
SearchDeviceInfoList (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN UINT16 Port,
IN UINT16 PortMultiplier,
IN EFI_ATA_DEVICE_TYPE DeviceType
IN UINT16 Port,
IN UINT16 PortMultiplier,
IN EFI_ATA_DEVICE_TYPE DeviceType
);
/**
@@ -470,10 +471,10 @@ EFI_STATUS
EFIAPI
CreateNewDeviceInfo (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN UINT16 Port,
IN UINT16 PortMultiplier,
IN EFI_ATA_DEVICE_TYPE DeviceType,
IN EFI_IDENTIFY_DATA *IdentifyData
IN UINT16 Port,
IN UINT16 PortMultiplier,
IN EFI_ATA_DEVICE_TYPE DeviceType,
IN EFI_IDENTIFY_DATA *IdentifyData
);
/**
@@ -499,7 +500,7 @@ DestroyDeviceInfoList (
VOID
EFIAPI
DestroyAsynTaskList (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN BOOLEAN IsSigEvent
);
@@ -517,7 +518,7 @@ DestroyAsynTaskList (
EFI_STATUS
EFIAPI
EnumerateAttachedDevice (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -532,7 +533,7 @@ VOID
EFIAPI
AsyncNonBlockingTransferRoutine (
EFI_EVENT Event,
VOID* Context
VOID *Context
);
/**
@@ -567,11 +568,11 @@ AsyncNonBlockingTransferRoutine (
EFI_STATUS
EFIAPI
AtaPassThruPassThru (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort,
IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
IN EFI_EVENT Event OPTIONAL
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort,
IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET *Packet,
IN EFI_EVENT Event OPTIONAL
);
/**
@@ -608,8 +609,8 @@ AtaPassThruPassThru (
EFI_STATUS
EFIAPI
AtaPassThruGetNextPort (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN OUT UINT16 *Port
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN OUT UINT16 *Port
);
/**
@@ -657,9 +658,9 @@ AtaPassThruGetNextPort (
EFI_STATUS
EFIAPI
AtaPassThruGetNextDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN OUT UINT16 *PortMultiplierPort
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN OUT UINT16 *PortMultiplierPort
);
/**
@@ -697,10 +698,10 @@ AtaPassThruGetNextDevice (
EFI_STATUS
EFIAPI
AtaPassThruBuildDevicePath (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort,
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort,
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -743,10 +744,10 @@ AtaPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
AtaPassThruGetDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
OUT UINT16 *Port,
OUT UINT16 *PortMultiplierPort
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
OUT UINT16 *Port,
OUT UINT16 *PortMultiplierPort
);
/**
@@ -776,8 +777,8 @@ AtaPassThruGetDevice (
EFI_STATUS
EFIAPI
AtaPassThruResetPort (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port
);
/**
@@ -814,9 +815,9 @@ AtaPassThruResetPort (
EFI_STATUS
EFIAPI
AtaPassThruResetDevice (
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort
IN EFI_ATA_PASS_THRU_PROTOCOL *This,
IN UINT16 Port,
IN UINT16 PortMultiplierPort
);
/**
@@ -863,11 +864,11 @@ AtaPassThruResetDevice (
EFI_STATUS
EFIAPI
ExtScsiPassThruPassThru (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun,
IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
IN EFI_EVENT Event OPTIONAL
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun,
IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
IN EFI_EVENT Event OPTIONAL
);
/**
@@ -899,9 +900,9 @@ ExtScsiPassThruPassThru (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTargetLun (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN OUT UINT8 **Target,
IN OUT UINT64 *Lun
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN OUT UINT8 **Target,
IN OUT UINT64 *Lun
);
/**
@@ -934,10 +935,10 @@ ExtScsiPassThruGetNextTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruBuildDevicePath (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun,
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun,
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -962,10 +963,10 @@ ExtScsiPassThruBuildDevicePath (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetTargetLun (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
OUT UINT8 **Target,
OUT UINT64 *Lun
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
OUT UINT8 **Target,
OUT UINT64 *Lun
);
/**
@@ -982,7 +983,7 @@ ExtScsiPassThruGetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetChannel (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
);
/**
@@ -1007,9 +1008,9 @@ ExtScsiPassThruResetChannel (
EFI_STATUS
EFIAPI
ExtScsiPassThruResetTargetLun (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN UINT8 *Target,
IN UINT64 Lun
);
/**
@@ -1037,8 +1038,8 @@ ExtScsiPassThruResetTargetLun (
EFI_STATUS
EFIAPI
ExtScsiPassThruGetNextTarget (
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN OUT UINT8 **Target
IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
IN OUT UINT8 **Target
);
/**
@@ -1052,7 +1053,7 @@ ExtScsiPassThruGetNextTarget (
EFI_STATUS
EFIAPI
IdeModeInitialization (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -1066,7 +1067,7 @@ IdeModeInitialization (
EFI_STATUS
EFIAPI
AhciModeInitialization (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance
);
/**
@@ -1094,16 +1095,16 @@ AhciModeInitialization (
EFI_STATUS
EFIAPI
AhciNonDataTransfer (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1134,19 +1135,19 @@ AhciNonDataTransfer (
EFI_STATUS
EFIAPI
AhciDmaTransfer (
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN OUT VOID *MemoryAddr,
IN UINT32 DataCount,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
IN ATA_ATAPI_PASS_THRU_INSTANCE *Instance,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN OUT VOID *MemoryAddr,
IN UINT32 DataCount,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1177,19 +1178,19 @@ AhciDmaTransfer (
EFI_STATUS
EFIAPI
AhciPioTransfer (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN OUT VOID *MemoryAddr,
IN UINT32 DataCount,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_AHCI_REGISTERS *AhciRegisters,
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN EFI_AHCI_ATAPI_COMMAND *AtapiCommand OPTIONAL,
IN UINT8 AtapiCommandLength,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN OUT VOID *MemoryAddr,
IN UINT32 DataCount,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1213,12 +1214,12 @@ AhciPioTransfer (
EFI_STATUS
EFIAPI
AtaNonDataCommandIn (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
);
/**
@@ -1284,16 +1285,15 @@ AtaUdmaInOut (
EFI_STATUS
EFIAPI
AtaPioDataInOut (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN OUT VOID *Buffer,
IN UINT64 ByteCount,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN OUT VOID *Buffer,
IN UINT64 ByteCount,
IN BOOLEAN Read,
IN EFI_ATA_COMMAND_BLOCK *AtaCommandBlock,
IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock,
IN UINT64 Timeout,
IN ATA_NONBLOCK_TASK *Task
);
#endif

31
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ComponentName.c
View File

@@ -11,22 +11,22 @@
//
// Driver name table
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruDriverNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruDriverNameTable[] = {
{ "eng;en", L"AtaAtapiPassThru Driver" },
{ NULL , NULL }
{ NULL, NULL }
};
//
// Controller name table
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruIdeControllerNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruIdeControllerNameTable[] = {
{ "eng;en", L"IDE Controller" },
{ NULL , NULL }
{ NULL, NULL }
};
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruAhciControllerNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mAtaAtapiPassThruAhciControllerNameTable[] = {
{ "eng;en", L"AHCI Controller" },
{ NULL , NULL }
{ NULL, NULL }
};
//
@@ -41,9 +41,9 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gAtaAtapiPassThruComp
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) AtaAtapiPassThruComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) AtaAtapiPassThruComponentNameGetControllerName,
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gAtaAtapiPassThruComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME)AtaAtapiPassThruComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)AtaAtapiPassThruComponentNameGetControllerName,
"en"
};
@@ -103,7 +103,6 @@ AtaAtapiPassThruComponentNameGetDriverName (
);
}
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
@@ -175,11 +174,11 @@ AtaAtapiPassThruComponentNameGetDriverName (
EFI_STATUS
EFIAPI
AtaAtapiPassThruComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
EFI_STATUS Status;
@@ -187,7 +186,7 @@ AtaAtapiPassThruComponentNameGetControllerName (
VOID *Interface;
ATA_ATAPI_PASS_THRU_INSTANCE *Instance;
if (Language == NULL || ControllerName == NULL) {
if ((Language == NULL) || (ControllerName == NULL)) {
return EFI_INVALID_PARAMETER;
}

580
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
View File

File diff suppressed because it is too large Load Diff

66
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.h
View File

@@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __ATA_HC_IDE_MODE_H__
#define __ATA_HC_IDE_MODE_H__
@@ -59,50 +60,50 @@ typedef enum {
#define BMIS_INTERRUPT BIT2
#define BMIS_ERROR BIT1
#define BMIC_OFFSET 0x00
#define BMIS_OFFSET 0x02
#define BMID_OFFSET 0x04
#define BMIC_OFFSET 0x00
#define BMIS_OFFSET 0x02
#define BMID_OFFSET 0x04
//
// IDE transfer mode
//
#define EFI_ATA_MODE_DEFAULT_PIO 0x00
#define EFI_ATA_MODE_FLOW_PIO 0x01
#define EFI_ATA_MODE_MDMA 0x04
#define EFI_ATA_MODE_UDMA 0x08
#define EFI_ATA_MODE_DEFAULT_PIO 0x00
#define EFI_ATA_MODE_FLOW_PIO 0x01
#define EFI_ATA_MODE_MDMA 0x04
#define EFI_ATA_MODE_UDMA 0x08
typedef struct {
UINT32 RegionBaseAddr;
UINT16 ByteCount;
UINT16 EndOfTable;
UINT32 RegionBaseAddr;
UINT16 ByteCount;
UINT16 EndOfTable;
} EFI_ATA_DMA_PRD;
typedef struct {
UINT8 ModeNumber : 3;
UINT8 ModeCategory : 5;
UINT8 ModeNumber : 3;
UINT8 ModeCategory : 5;
} EFI_ATA_TRANSFER_MODE;
typedef struct {
UINT8 Sector;
UINT8 Heads;
UINT8 MultipleSector;
UINT8 Sector;
UINT8 Heads;
UINT8 MultipleSector;
} EFI_ATA_DRIVE_PARMS;
//
// IDE registers set
//
typedef struct {
UINT16 Data;
UINT16 ErrOrFeature;
UINT16 SectorCount;
UINT16 SectorNumber;
UINT16 CylinderLsb;
UINT16 CylinderMsb;
UINT16 Head;
UINT16 CmdOrStatus;
UINT16 AltOrDev;
UINT16 Data;
UINT16 ErrOrFeature;
UINT16 SectorCount;
UINT16 SectorNumber;
UINT16 CylinderLsb;
UINT16 CylinderMsb;
UINT16 Head;
UINT16 CmdOrStatus;
UINT16 AltOrDev;
UINT16 BusMasterBaseAddr;
UINT16 BusMasterBaseAddr;
} EFI_IDE_REGISTERS;
//
@@ -164,8 +165,8 @@ typedef struct {
EFI_STATUS
EFIAPI
GetIdeRegisterIoAddr (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN OUT EFI_IDE_REGISTERS *IdeRegisters
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN OUT EFI_IDE_REGISTERS *IdeRegisters
);
/**
@@ -187,12 +188,11 @@ GetIdeRegisterIoAddr (
EFI_STATUS
EFIAPI
AtaPacketCommandExecute (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT8 Channel,
IN UINT8 Device,
IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_IDE_REGISTERS *IdeRegisters,
IN UINT8 Channel,
IN UINT8 Device,
IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet
);
#endif