MdeModulePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdeModulePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
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@@ -11,7 +11,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#ifndef _EFI_EHCI_H_
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#define _EFI_EHCI_H_
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#include <Uefi.h>
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#include <Protocol/Usb2HostController.h>
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@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <IndustryStandard/Pci.h>
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typedef struct _USB2_HC_DEV USB2_HC_DEV;
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typedef struct _USB2_HC_DEV USB2_HC_DEV;
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#include "UsbHcMem.h"
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#include "EhciReg.h"
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@@ -44,64 +43,63 @@ typedef struct _USB2_HC_DEV USB2_HC_DEV;
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// EHC timeout experience values
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//
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#define EHC_1_MICROSECOND 1
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#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
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#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
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#define EHC_1_MICROSECOND 1
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#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
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#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
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//
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// EHCI register operation timeout, set by experience
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//
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#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
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#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
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#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
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#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
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//
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// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
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//
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#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
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#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
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//
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// Sync and Async transfer polling interval, set by experience,
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// and the unit of Async is 100us, means 1ms as interval.
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//
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#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
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#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
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#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
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#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
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//
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// EHCI debug port control status register bit definition
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//
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#define USB_DEBUG_PORT_IN_USE BIT10
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#define USB_DEBUG_PORT_ENABLE BIT28
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#define USB_DEBUG_PORT_OWNER BIT30
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#define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \
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#define USB_DEBUG_PORT_IN_USE BIT10
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#define USB_DEBUG_PORT_ENABLE BIT28
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#define USB_DEBUG_PORT_OWNER BIT30
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#define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \
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USB_DEBUG_PORT_OWNER)
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//
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// EHC raises TPL to TPL_NOTIFY to serialize all its operations
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// to protect shared data structures.
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//
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#define EHC_TPL TPL_NOTIFY
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#define EHC_TPL TPL_NOTIFY
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#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
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#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
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#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
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#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
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#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
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#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
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#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
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#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
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#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
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(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
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#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
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#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
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#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
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struct _USB2_HC_DEV {
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UINTN Signature;
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EFI_USB2_HC_PROTOCOL Usb2Hc;
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UINTN Signature;
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EFI_USB2_HC_PROTOCOL Usb2Hc;
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EFI_PCI_IO_PROTOCOL *PciIo;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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UINT64 OriginalPciAttributes;
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USBHC_MEM_POOL *MemPool;
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EFI_PCI_IO_PROTOCOL *PciIo;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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UINT64 OriginalPciAttributes;
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USBHC_MEM_POOL *MemPool;
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//
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// Schedule data shared between asynchronous and periodic
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@@ -112,58 +110,57 @@ struct _USB2_HC_DEV {
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// For control transfer, even the short read happens, try the
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// status stage.
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//
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EHC_QTD *ShortReadStop;
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EFI_EVENT PollTimer;
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EHC_QTD *ShortReadStop;
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EFI_EVENT PollTimer;
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//
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// ExitBootServicesEvent is used to stop the EHC DMA operation
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// after exit boot service.
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//
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EFI_EVENT ExitBootServiceEvent;
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EFI_EVENT ExitBootServiceEvent;
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//
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// Asynchronous(bulk and control) transfer schedule data:
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// ReclaimHead is used as the head of the asynchronous transfer
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// list. It acts as the reclamation header.
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//
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EHC_QH *ReclaimHead;
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EHC_QH *ReclaimHead;
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//
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// Periodic (interrupt) transfer schedule data:
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//
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VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
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VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
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VOID *PeriodFrameMap;
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VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
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VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
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VOID *PeriodFrameMap;
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EHC_QH *PeriodOne;
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LIST_ENTRY AsyncIntTransfers;
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EHC_QH *PeriodOne;
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LIST_ENTRY AsyncIntTransfers;
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//
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// EHCI configuration data
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//
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UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
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UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
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UINT32 CapLen; // Capability length
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UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
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UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
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UINT32 CapLen; // Capability length
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//
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// Misc
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//
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EFI_UNICODE_STRING_TABLE *ControllerNameTable;
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EFI_UNICODE_STRING_TABLE *ControllerNameTable;
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//
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// EHCI debug port info
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//
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UINT16 DebugPortOffset; // The offset of debug port mmio register
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UINT8 DebugPortBarNum; // The bar number of debug port mmio register
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UINT8 DebugPortNum; // The port number of usb debug port
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UINT16 DebugPortOffset; // The offset of debug port mmio register
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UINT8 DebugPortBarNum; // The bar number of debug port mmio register
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UINT8 DebugPortNum; // The port number of usb debug port
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BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
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BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
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};
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extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
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extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
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extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
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extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
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extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
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extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
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/**
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Test to see if this driver supports ControllerHandle. Any
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@@ -181,9 +178,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
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EFI_STATUS
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EFIAPI
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EhcDriverBindingSupported (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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);
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/**
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@@ -202,9 +199,9 @@ EhcDriverBindingSupported (
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EFI_STATUS
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EFIAPI
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EhcDriverBindingStart (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
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);
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/**
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@@ -223,11 +220,10 @@ EhcDriverBindingStart (
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EFI_STATUS
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EFIAPI
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EhcDriverBindingStop (
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN UINTN NumberOfChildren,
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IN EFI_HANDLE *ChildHandleBuffer
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IN EFI_DRIVER_BINDING_PROTOCOL *This,
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IN EFI_HANDLE Controller,
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IN UINTN NumberOfChildren,
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IN EFI_HANDLE *ChildHandleBuffer
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);
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#endif
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