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MdeModulePkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdeModulePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:02 -08:00
committed by mergify[bot]
parent 7c7184e201
commit 1436aea4d5
994 changed files with 107608 additions and 101311 deletions
Download Patch File Download Diff File Expand all files Collapse all files

138
MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
View File

@@ -14,42 +14,42 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// UHCI register offset
//
#define UHCI_FRAME_NUM 1024
#define UHCI_FRAME_NUM 1024
//
// Register offset and PCI related staff
//
#define USB_BAR_INDEX 4
#define USB_BAR_INDEX 4
#define USBCMD_OFFSET 0
#define USBSTS_OFFSET 2
#define USBINTR_OFFSET 4
#define USBPORTSC_OFFSET 0x10
#define USB_FRAME_NO_OFFSET 6
#define USB_FRAME_BASE_OFFSET 8
#define USB_EMULATION_OFFSET 0xC0
#define USBCMD_OFFSET 0
#define USBSTS_OFFSET 2
#define USBINTR_OFFSET 4
#define USBPORTSC_OFFSET 0x10
#define USB_FRAME_NO_OFFSET 6
#define USB_FRAME_BASE_OFFSET 8
#define USB_EMULATION_OFFSET 0xC0
//
// Packet IDs
//
#define SETUP_PACKET_ID 0x2D
#define INPUT_PACKET_ID 0x69
#define OUTPUT_PACKET_ID 0xE1
#define ERROR_PACKET_ID 0x55
#define SETUP_PACKET_ID 0x2D
#define INPUT_PACKET_ID 0x69
#define OUTPUT_PACKET_ID 0xE1
#define ERROR_PACKET_ID 0x55
//
// USB port status and control bit definition.
//
#define USBPORTSC_CCS BIT0 // Current Connect Status
#define USBPORTSC_CSC BIT1 // Connect Status Change
#define USBPORTSC_PED BIT2 // Port Enable / Disable
#define USBPORTSC_PEDC BIT3 // Port Enable / Disable Change
#define USBPORTSC_LSL BIT4 // Line Status Low BIT
#define USBPORTSC_LSH BIT5 // Line Status High BIT
#define USBPORTSC_RD BIT6 // Resume Detect
#define USBPORTSC_LSDA BIT8 // Low Speed Device Attached
#define USBPORTSC_PR BIT9 // Port Reset
#define USBPORTSC_SUSP BIT12 // Suspend
#define USBPORTSC_CCS BIT0 // Current Connect Status
#define USBPORTSC_CSC BIT1 // Connect Status Change
#define USBPORTSC_PED BIT2 // Port Enable / Disable
#define USBPORTSC_PEDC BIT3 // Port Enable / Disable Change
#define USBPORTSC_LSL BIT4 // Line Status Low BIT
#define USBPORTSC_LSH BIT5 // Line Status High BIT
#define USBPORTSC_RD BIT6 // Resume Detect
#define USBPORTSC_LSDA BIT8 // Low Speed Device Attached
#define USBPORTSC_PR BIT9 // Port Reset
#define USBPORTSC_SUSP BIT12 // Suspend
//
// UHCI Spec said it must implement 2 ports each host at least,
@@ -61,33 +61,32 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Command register bit definitions
//
#define USBCMD_RS BIT0 // Run/Stop
#define USBCMD_HCRESET BIT1 // Host reset
#define USBCMD_GRESET BIT2 // Global reset
#define USBCMD_EGSM BIT3 // Global Suspend Mode
#define USBCMD_FGR BIT4 // Force Global Resume
#define USBCMD_SWDBG BIT5 // SW Debug mode
#define USBCMD_CF BIT6 // Config Flag (sw only)
#define USBCMD_MAXP BIT7 // Max Packet (0 = 32, 1 = 64)
#define USBCMD_RS BIT0 // Run/Stop
#define USBCMD_HCRESET BIT1 // Host reset
#define USBCMD_GRESET BIT2 // Global reset
#define USBCMD_EGSM BIT3 // Global Suspend Mode
#define USBCMD_FGR BIT4 // Force Global Resume
#define USBCMD_SWDBG BIT5 // SW Debug mode
#define USBCMD_CF BIT6 // Config Flag (sw only)
#define USBCMD_MAXP BIT7 // Max Packet (0 = 32, 1 = 64)
//
// USB Status register bit definitions
//
#define USBSTS_USBINT BIT0 // Interrupt due to IOC
#define USBSTS_ERROR BIT1 // Interrupt due to error
#define USBSTS_RD BIT2 // Resume Detect
#define USBSTS_HSE BIT3 // Host System Error
#define USBSTS_HCPE BIT4 // Host Controller Process Error
#define USBSTS_HCH BIT5 // HC Halted
#define USBTD_ACTIVE BIT7 // TD is still active
#define USBTD_STALLED BIT6 // TD is stalled
#define USBTD_BUFFERR BIT5 // Buffer underflow or overflow
#define USBTD_BABBLE BIT4 // Babble condition
#define USBTD_NAK BIT3 // NAK is received
#define USBTD_CRC BIT2 // CRC/Time out error
#define USBTD_BITSTUFF BIT1 // Bit stuff error
#define USBSTS_USBINT BIT0 // Interrupt due to IOC
#define USBSTS_ERROR BIT1 // Interrupt due to error
#define USBSTS_RD BIT2 // Resume Detect
#define USBSTS_HSE BIT3 // Host System Error
#define USBSTS_HCPE BIT4 // Host Controller Process Error
#define USBSTS_HCH BIT5 // HC Halted
#define USBTD_ACTIVE BIT7 // TD is still active
#define USBTD_STALLED BIT6 // TD is stalled
#define USBTD_BUFFERR BIT5 // Buffer underflow or overflow
#define USBTD_BABBLE BIT4 // Babble condition
#define USBTD_NAK BIT3 // NAK is received
#define USBTD_CRC BIT2 // CRC/Time out error
#define USBTD_BITSTUFF BIT1 // Bit stuff error
/**
Read a UHCI register.
@@ -100,12 +99,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
UINT16
UhciReadReg (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset
);
/**
Write data to UHCI register.
@@ -118,13 +115,11 @@ UhciReadReg (
**/
VOID
UhciWriteReg (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Data
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Data
);
/**
Set a bit of the UHCI Register.
@@ -137,13 +132,11 @@ UhciWriteReg (
**/
VOID
UhciSetRegBit (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Bit
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Bit
);
/**
Clear a bit of the UHCI Register.
@@ -156,12 +149,11 @@ UhciSetRegBit (
**/
VOID
UhciClearRegBit (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Bit
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINT32 Offset,
IN UINT16 Bit
);
/**
Clear all the interrutp status bits, these bits
are Write-Clean.
@@ -173,10 +165,9 @@ UhciClearRegBit (
**/
VOID
UhciAckAllInterrupt (
IN USB_HC_DEV *Uhc
IN USB_HC_DEV *Uhc
);
/**
Stop the host controller.
@@ -189,12 +180,10 @@ UhciAckAllInterrupt (
**/
EFI_STATUS
UhciStopHc (
IN USB_HC_DEV *Uhc,
IN UINTN Timeout
IN USB_HC_DEV *Uhc,
IN UINTN Timeout
);
/**
Check whether the host controller operates well.
@@ -206,10 +195,9 @@ UhciStopHc (
**/
BOOLEAN
UhciIsHcWorking (
IN EFI_PCI_IO_PROTOCOL *PciIo
IN EFI_PCI_IO_PROTOCOL *PciIo
);
/**
Set the UHCI frame list base address. It can't use
UhciWriteReg which access memory in UINT16.
@@ -222,11 +210,10 @@ UhciIsHcWorking (
**/
VOID
UhciSetFrameListBaseAddr (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN VOID *Addr
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN VOID *Addr
);
/**
Disable USB Emulation.
@@ -237,6 +224,7 @@ UhciSetFrameListBaseAddr (
**/
VOID
UhciTurnOffUsbEmulation (
IN EFI_PCI_IO_PROTOCOL *PciIo
IN EFI_PCI_IO_PROTOCOL *PciIo
);
#endif