MdeModulePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdeModulePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
committed by
mergify[bot]
parent
7c7184e201
commit
1436aea4d5
@@ -27,7 +27,7 @@
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**/
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UINTN
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PciCfgAddressConvert (
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EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address
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EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address
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)
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{
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if (Address->ExtendedRegister == 0) {
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@@ -55,52 +55,52 @@ PciCfgAddressConvert (
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EFI_STATUS
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EFIAPI
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PciCfg2Read (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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)
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{
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *)Buffer) = PciRead8 (PciLibAddress);
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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WriteUnaligned16 (((UINT16 *)Buffer), PciRead16 (PciLibAddress));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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*((UINT8 *)Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *)Buffer + 1) = PciRead8 (PciLibAddress + 1);
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));
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WriteUnaligned32 (((UINT32 *)Buffer), PciRead32 (PciLibAddress));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));
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WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));
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WriteUnaligned16 (((UINT16 *)Buffer), PciRead16 (PciLibAddress));
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WriteUnaligned16 (((UINT16 *)Buffer + 1), PciRead16 (PciLibAddress + 2));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);
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*((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);
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*((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);
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*((UINT8 *)Buffer) = PciRead8 (PciLibAddress);
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*((UINT8 *)Buffer + 1) = PciRead8 (PciLibAddress + 1);
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*((UINT8 *)Buffer + 2) = PciRead8 (PciLibAddress + 2);
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*((UINT8 *)Buffer + 3) = PciRead8 (PciLibAddress + 3);
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}
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} else {
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return EFI_INVALID_PARAMETER;
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@@ -127,52 +127,52 @@ PciCfg2Read (
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EFI_STATUS
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EFIAPI
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PciCfg2Write (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN OUT VOID *Buffer
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)
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{
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UINTN PciLibAddress;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *)Buffer));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *)Buffer + 1));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));
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PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *)Buffer));
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));
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PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));
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PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *)Buffer));
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PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *)Buffer + 1));
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));
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PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2));
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PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3));
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PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));
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PciWrite8 (PciLibAddress + 1, *((UINT8 *)Buffer + 1));
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PciWrite8 (PciLibAddress + 2, *((UINT8 *)Buffer + 2));
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PciWrite8 (PciLibAddress + 3, *((UINT8 *)Buffer + 3));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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@@ -181,7 +181,6 @@ PciCfg2Write (
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return EFI_SUCCESS;
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}
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/**
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This function performs a read-modify-write operation on the contents from a given
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location in the PCI configuration space.
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@@ -204,12 +203,12 @@ PciCfg2Write (
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EFI_STATUS
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EFIAPI
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PciCfg2Modify (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN VOID *SetBits,
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IN VOID *ClearBits
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_PEI_PCI_CFG2_PPI *This,
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IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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IN UINT64 Address,
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IN VOID *SetBits,
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IN VOID *ClearBits
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)
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{
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UINTN PciLibAddress;
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@@ -218,52 +217,52 @@ PciCfg2Modify (
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UINT32 ClearValue32;
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UINT32 SetValue32;
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);
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PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);
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if (Width == EfiPeiPciCfgWidthUint8) {
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));
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} else if (Width == EfiPeiPciCfgWidthUint16) {
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if ((PciLibAddress & 0x01) == 0) {
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//
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// Aligned Pci address access
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//
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);
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ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits);
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PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));
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PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8)(~(*((UINT8 *)ClearBits + 1))), *((UINT8 *)SetBits + 1));
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}
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} else if (Width == EfiPeiPciCfgWidthUint32) {
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if ((PciLibAddress & 0x03) == 0) {
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//
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// Aligned Pci address access
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//
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ClearValue32 = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));
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SetValue32 = ReadUnaligned32 ((UINT32 *) SetBits);
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ClearValue32 = (UINT32)(~ReadUnaligned32 ((UINT32 *)ClearBits));
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SetValue32 = ReadUnaligned32 ((UINT32 *)SetBits);
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PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);
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} else if ((PciLibAddress & 0x01) == 0) {
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//
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// Unaligned Pci address access, break up the request into word by word.
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//
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);
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ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits));
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SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits);
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PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);
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ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits + 1));
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SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits + 1);
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ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits + 1));
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SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits + 1);
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PciAndThenOr16 (PciLibAddress + 2, ClearValue16, SetValue16);
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} else {
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//
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// Unaligned Pci address access, break up the request into byte by byte.
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//
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PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));
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PciAndThenOr8 (PciLibAddress + 2, (UINT8) (~(*((UINT8 *) ClearBits + 2))), *((UINT8 *) SetBits + 2));
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PciAndThenOr8 (PciLibAddress + 3, (UINT8) (~(*((UINT8 *) ClearBits + 3))), *((UINT8 *) SetBits + 3));
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PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));
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PciAndThenOr8 (PciLibAddress + 1, (UINT8)(~(*((UINT8 *)ClearBits + 1))), *((UINT8 *)SetBits + 1));
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PciAndThenOr8 (PciLibAddress + 2, (UINT8)(~(*((UINT8 *)ClearBits + 2))), *((UINT8 *)SetBits + 2));
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PciAndThenOr8 (PciLibAddress + 3, (UINT8)(~(*((UINT8 *)ClearBits + 3))), *((UINT8 *)SetBits + 3));
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}
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} else {
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return EFI_INVALID_PARAMETER;
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@@ -272,14 +271,14 @@ PciCfg2Modify (
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return EFI_SUCCESS;
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}
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EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {
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EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {
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PciCfg2Read,
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PciCfg2Write,
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PciCfg2Modify,
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0
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};
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EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {
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EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiPciCfg2PpiGuid,
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&gPciCfg2Ppi
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@@ -301,10 +300,10 @@ PeimInitializePciCfg (
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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(**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;
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Status = PeiServicesInstallPpi (&gPciCfg2PpiList);
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Status = PeiServicesInstallPpi (&gPciCfg2PpiList);
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ASSERT_EFI_ERROR (Status);
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return Status;
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