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ArmPkg: use unified asm syntax for CLANG

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The CLANG assembler does not support the legacy, non-unified assembler syntax,
i.e., it does not support the reordering of the condition suffixes with the
increment/decrement before/after or byte/word suffixes, and it does not
recognize the 'empty descending' (ED) suffix at all. So move to the unified
syntax, and replace 'empty descending' with 'decrement after' or 'increment
before' as appropriate.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19280 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel
2015-12-15 15:01:42 +00:00
committed by abiesheuvel
parent 660aaec311
commit 1a0db79125
9 changed files with 30 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S
View File

@@ -14,6 +14,7 @@
#
.text
.syntax unified
.p2align 2
GCC_ASM_EXPORT(__switch16)
@@ -22,9 +23,9 @@ ASM_PFX(__switch16):
ldrh ip, [lr, #-1]
cmp r0, ip
add r0, lr, r0, lsl #1
ldrccsh r0, [r0, #1]
ldrshcc r0, [r0, #1]
add ip, lr, ip, lsl #1
ldrcssh r0, [ip, #1]
ldrshcs r0, [ip, #1]
add ip, lr, r0, lsl #1
bx ip

1
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S
View File

@@ -14,6 +14,7 @@
#
.text
.syntax unified
.p2align 2
GCC_ASM_EXPORT(__switch32)

5
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S
View File

@@ -14,6 +14,7 @@
#
.text
.syntax unified
.p2align 2
GCC_ASM_EXPORT(__switch8)
@@ -21,8 +22,8 @@ GCC_ASM_EXPORT(__switch8)
ASM_PFX(__switch8):
ldrb ip, [lr, #-1]
cmp r0, ip
ldrccsb r0, [lr, r0]
ldrcssb r0, [lr, ip]
ldrsbcc r0, [lr, r0]
ldrsbcs r0, [lr, ip]
add ip, lr, r0, lsl #1
bx ip

5
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S
View File

@@ -14,6 +14,7 @@
#
.text
.syntax unified
.p2align 2
GCC_ASM_EXPORT(__switchu8)
@@ -22,8 +23,8 @@ GCC_ASM_EXPORT(__switchu8)
ASM_PFX(__switchu8):
ldrb ip,[lr,#-1]
cmp r0,ip
ldrccb r0,[lr,r0]
ldrcsb r0,[lr,ip]
ldrbcc r0,[lr,r0]
ldrbcs r0,[lr,ip]
add ip,lr,r0,LSL #1
bx ip

11
ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S
View File

@@ -13,6 +13,7 @@
#------------------------------------------------------------------------------
.text
.syntax unified
.align 2
GCC_ASM_EXPORT(__udivmoddi4)
@@ -44,7 +45,7 @@ L8:
L6:
cmp r6, #0
movne r1, #0
stmneia r6, {r0-r1}
stmiane r6, {r0-r1}
b L2
L4:
ldr r1, [sp, #0]
@@ -88,7 +89,7 @@ L18:
cmp r6, #0
movne r4, r0
andne r5, ip, r3
stmneia r6, {r4-r5}
stmiane r6, {r4-r5}
L24:
rsb r3, r2, #0
and r3, r2, r3
@@ -123,7 +124,7 @@ L12:
andne r3, r3, r0
movne r2, r3
movne r3, #0
stmneia r6, {r2-r3}
stmiane r6, {r2-r3}
L34:
cmp r1, #1
beq L10
@@ -175,7 +176,7 @@ L30:
bls L37
L48:
cmp r6, #0
stmneia r6, {r10-r11}
stmiane r6, {r10-r11}
b L2
L37:
rsb r1, r3, #31
@@ -229,7 +230,7 @@ L40:
cmp r6, #0
orr r10, r0, ip
mov r11, r1
stmneia r6, {r4-r5}
stmiane r6, {r4-r5}
b L10
L2:
mov r10, #0

3
ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
View File

@@ -13,6 +13,7 @@
#------------------------------------------------------------------------------
.text
.syntax unified
.align 2
GCC_ASM_EXPORT(__udivsi3)
@@ -27,7 +28,7 @@ ASM_PFX(__udivsi3):
rsb r3, r3, r2
cmp r3, #31
bhi L2
ldmeqfd sp!, {r4, r5, r7, pc}
ldmfdeq sp!, {r4, r5, r7, pc}
add r5, r3, #1
rsb r3, r3, #31
mov lr, #0