ArmPlatformPkg: Unify the Secure and Normal FD and FV PCD naming

With this change, we now have these following PCDs values to define the
location of the Secure and Normal firmwares:
- gArmTokenSpaceGuid.PcdSecureFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdSecureFv(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFv(BaseAddress|Size)



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11806 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
2011-06-11 12:06:59 +00:00
parent 9d074e739f
commit 1ad14bc86b
16 changed files with 45 additions and 49 deletions

View File

@@ -77,8 +77,8 @@ VOID primary_main (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));

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@@ -39,8 +39,8 @@ VOID primary_main (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));

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@@ -35,8 +35,8 @@ ASM_PFX(_ModuleEntryPoint):
_SetupStack:
# Setup Stack for the 4 CPU cores
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
mov r3,r0 @ r3 = core_id
mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base
@@ -55,7 +55,7 @@ _AllocateGlobalPeiVariables:
_PrepareArguments:
# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
add r2, r2, #4
ldr r1, [r2]

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@@ -53,7 +53,7 @@ _AllocateGlobalPeiVariables
_PrepareArguments
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
add r2, r2, #4
ldr r1, [r2]

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@@ -53,8 +53,8 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
gArmTokenSpaceGuid.PcdNormalFvSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize

View File

@@ -42,7 +42,6 @@
IoLib
ArmLib
ArmPlatformLib
SerialPortLib
[Ppis]
gEfiTemporaryRamSupportPpiGuid
@@ -51,8 +50,8 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
gArmTokenSpaceGuid.PcdNormalFvSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize