ArmPlatformPkg: Unify the Secure and Normal FD and FV PCD naming
With this change, we now have these following PCDs values to define the location of the Secure and Normal firmwares: - gArmTokenSpaceGuid.PcdSecureFd(BaseAddress|Size) - gArmTokenSpaceGuid.PcdSecureFv(BaseAddress|Size) - gArmTokenSpaceGuid.PcdNormalFd(BaseAddress|Size) - gArmTokenSpaceGuid.PcdNormalFv(BaseAddress|Size) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11806 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -77,8 +77,8 @@ VOID primary_main (
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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@@ -39,8 +39,8 @@ VOID primary_main (
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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@@ -35,8 +35,8 @@ ASM_PFX(_ModuleEntryPoint):
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_SetupStack:
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# Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase) ,r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize) ,r2)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
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mov r3,r0 @ r3 = core_id
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mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base
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@@ -55,7 +55,7 @@ _AllocateGlobalPeiVariables:
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_PrepareArguments:
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# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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@@ -53,7 +53,7 @@ _AllocateGlobalPeiVariables
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_PrepareArguments
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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@@ -53,8 +53,8 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdSize
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress
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gArmTokenSpaceGuid.PcdNormalFvSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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@@ -42,7 +42,6 @@
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IoLib
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ArmLib
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ArmPlatformLib
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SerialPortLib
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[Ppis]
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gEfiTemporaryRamSupportPpiGuid
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@@ -51,8 +50,8 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdSize
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress
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gArmTokenSpaceGuid.PcdNormalFvSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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