Sync up ArmPkg with patch from mailing list. Changed name of BdsLib.h to BdsUnixLib.h and fixed a lot of issues with Xcode building.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11293 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
andrewfish
@@ -12,55 +12,51 @@
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#
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#------------------------------------------------------------------------------
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.globl ASM_PFX(ArmInvalidateInstructionCache)
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INTERWORK_FUNC(ArmInvalidateInstructionCache)
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.globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
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INTERWORK_FUNC(ArmInvalidateDataCacheEntryByMVA)
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.globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
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INTERWORK_FUNC(ArmCleanDataCacheEntryByMVA)
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.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
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INTERWORK_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
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.globl ASM_PFX(ArmInvalidateDataCacheEntryBySetWay)
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INTERWORK_FUNC(ArmInvalidateDataCacheEntryBySetWay)
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.globl ASM_PFX(ArmCleanDataCacheEntryBySetWay)
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INTERWORK_FUNC(ArmCleanDataCacheEntryBySetWay)
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.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryBySetWay)
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INTERWORK_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
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.globl ASM_PFX(ArmDrainWriteBuffer)
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INTERWORK_FUNC(ArmDrainWriteBuffer)
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.globl ASM_PFX(ArmEnableMmu)
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INTERWORK_FUNC(ArmEnableMmu)
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.globl ASM_PFX(ArmDisableMmu)
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INTERWORK_FUNC(ArmDisableMmu)
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.globl ASM_PFX(ArmMmuEnabled)
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INTERWORK_FUNC(ArmMmuEnabled)
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.globl ASM_PFX(ArmEnableDataCache)
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INTERWORK_FUNC(ArmEnableDataCache)
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.globl ASM_PFX(ArmDisableDataCache)
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INTERWORK_FUNC(ArmDisableDataCache)
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.globl ASM_PFX(ArmEnableInstructionCache)
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INTERWORK_FUNC(ArmEnableInstructionCache)
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.globl ASM_PFX(ArmDisableInstructionCache)
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INTERWORK_FUNC(ArmDisableInstructionCache)
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.globl ASM_PFX(ArmEnableBranchPrediction)
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INTERWORK_FUNC(ArmEnableBranchPrediction)
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.globl ASM_PFX(ArmDisableBranchPrediction)
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INTERWORK_FUNC(ArmDisableBranchPrediction)
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.globl ASM_PFX(ArmV7AllDataCachesOperation)
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INTERWORK_FUNC(ArmV7AllDataCachesOperation)
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.globl ASM_PFX(ArmDataMemoryBarrier)
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INTERWORK_FUNC(ArmDataMemoryBarrier)
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.globl ASM_PFX(ArmDataSyncronizationBarrier)
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INTERWORK_FUNC(ArmDataSyncronizationBarrier)
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.globl ASM_PFX(ArmInstructionSynchronizationBarrier)
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INTERWORK_FUNC(ArmInstructionSynchronizationBarrier)
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.text
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.align 2
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GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
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GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
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GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
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GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
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GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
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GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
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GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
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GCC_ASM_EXPORT (ArmDrainWriteBuffer)
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GCC_ASM_EXPORT (ArmEnableMmu)
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GCC_ASM_EXPORT (ArmDisableMmu)
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GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
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GCC_ASM_EXPORT (ArmMmuEnabled)
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GCC_ASM_EXPORT (ArmEnableDataCache)
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GCC_ASM_EXPORT (ArmDisableDataCache)
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GCC_ASM_EXPORT (ArmEnableInstructionCache)
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GCC_ASM_EXPORT (ArmDisableInstructionCache)
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GCC_ASM_EXPORT (ArmEnableSWPInstruction)
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GCC_ASM_EXPORT (ArmEnableBranchPrediction)
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GCC_ASM_EXPORT (ArmDisableBranchPrediction)
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GCC_ASM_EXPORT (ArmV7AllDataCachesOperation)
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GCC_ASM_EXPORT (ArmDataMemoryBarrier)
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GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
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GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
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GCC_ASM_EXPORT (ArmWriteNsacr)
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GCC_ASM_EXPORT (ArmWriteScr)
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GCC_ASM_EXPORT (ArmWriteVMBar)
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GCC_ASM_EXPORT (ArmWriteVBar)
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GCC_ASM_EXPORT (ArmWriteCPACR)
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GCC_ASM_EXPORT (ArmEnableVFP)
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GCC_ASM_EXPORT (ArmCallWFI)
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GCC_ASM_EXPORT (ArmWriteAuxCr)
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GCC_ASM_EXPORT (ArmReadAuxCr)
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GCC_ASM_EXPORT (ArmReadCbar)
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GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb)
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GCC_ASM_EXPORT (ArmReadMpidr)
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.set DC_ON, (0x1<<2)
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.set IC_ON, (0x1<<12)
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.set CTRL_M_BIT, (1 << 0)
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.set CTRL_C_BIT, (1 << 2)
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.set CTRL_B_BIT, (1 << 7)
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.set CTRL_I_BIT, (1 << 12)
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ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
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@@ -69,7 +65,6 @@ ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
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isb
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bx lr
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ASM_PFX(ArmCleanDataCacheEntryByMVA):
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mcr p15, 0, r0, c7, c10, 1 @clean single data cache line
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dsb
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@@ -104,7 +99,6 @@ ASM_PFX(ArmCleanDataCacheEntryBySetWay):
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isb
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bx lr
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ASM_PFX(ArmInvalidateInstructionCache):
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mcr p15,0,R0,c7,c5,0 @Invalidate entire instruction cache
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dsb
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@@ -119,10 +113,6 @@ ASM_PFX(ArmEnableMmu):
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isb
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bx LR
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ASM_PFX(ArmMmuEnabled):
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mrc p15,0,R0,c1,c0,0
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and R0,R0,#1
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bx LR
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ASM_PFX(ArmDisableMmu):
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mrc p15,0,R0,c1,c0,0
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@@ -135,6 +125,21 @@ ASM_PFX(ArmDisableMmu):
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isb
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bx LR
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ASM_PFX(ArmDisableCachesAndMmu):
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mrc p15, 0, r0, c1, c0, 0 @ Get control register
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bic r0, r0, #CTRL_M_BIT @ Disable MMU
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bic r0, r0, #CTRL_C_BIT @ Disable D Cache
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bic r0, r0, #CTRL_I_BIT @ Disable I Cache
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mcr p15, 0, r0, c1, c0, 0 @ Write control register
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dsb
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isb
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bx LR
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ASM_PFX(ArmMmuEnabled):
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mrc p15,0,R0,c1,c0,0
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and R0,R0,#1
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bx LR
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ASM_PFX(ArmEnableDataCache):
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ldr R1,=DC_ON
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mrc p15,0,R0,c1,c0,0 @Read control register configuration data
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@@ -171,6 +176,13 @@ ASM_PFX(ArmDisableInstructionCache):
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isb
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bx LR
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ASM_PFX(ArmEnableSWPInstruction):
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, #0x00000400
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mcr p15, 0, r0, c1, c0, 0
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isb
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bx LR
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ASM_PFX(ArmEnableBranchPrediction):
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, #0x00000800
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@@ -254,5 +266,59 @@ ASM_PFX(ArmInstructionSynchronizationBarrier):
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isb
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bx LR
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ASM_PFX(ArmWriteNsacr):
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mcr p15, 0, r0, c1, c1, 2
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bx lr
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ASM_PFX(ArmWriteScr):
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mcr p15, 0, r0, c1, c1, 0
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bx lr
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ASM_PFX(ArmWriteAuxCr):
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mcr p15, 0, r0, c1, c0, 1
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bx lr
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ASM_PFX(ArmReadAuxCr):
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mrc p15, 0, r0, c1, c0, 1
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bx lr
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ASM_PFX(ArmWriteVMBar):
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mcr p15, 0, r0, c12, c0, 1
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bx lr
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ASM_PFX(ArmWriteVBar):
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mcr p15, 0, r0, c12, c0, 0
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bx lr
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ASM_PFX(ArmWriteCPACR):
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mcr p15, 0, r0, c1, c0, 2
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bx lr
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ASM_PFX(ArmEnableVFP):
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// Enable VFP registers
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
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bx lr
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ASM_PFX(ArmCallWFI):
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wfi
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bx lr
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//Note: Return 0 in Uniprocessor implementation
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ASM_PFX(ArmReadCbar):
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mrc p15, 4, r0, c15, c0, 0 //Read Configuration Base Address Register
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bx lr
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ASM_PFX(ArmInvalidateInstructionAndDataTlb):
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mcr p15, 0, r0, c8, c7, 0 @ Invalidate Inst TLB and Data TLB
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dsb
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bx lr
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ASM_PFX(ArmReadMpidr):
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mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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