IntelFrameworkPkg: Clean up source files
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
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@@ -1,14 +1,14 @@
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/** @file
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This file declares the PciCfg PPI used to access the PCI configuration space in PEI
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Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This PPI is defined in PEI CIS
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@@ -85,7 +85,7 @@ EFI_STATUS
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);
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/**
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The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
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The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
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controllers behind a PCI root bridge controller.
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**/
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struct _EFI_PEI_PCI_CFG_PPI {
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@@ -93,12 +93,12 @@ struct _EFI_PEI_PCI_CFG_PPI {
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/// PCI read services. See the Read() function description.
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///
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EFI_PEI_PCI_CFG_PPI_IO Read;
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///
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/// PCI write services. See the Write() function description.
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///
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EFI_PEI_PCI_CFG_PPI_IO Write;
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///
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/// PCI read-modify-write services. See the Modify() function description.
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///
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