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Partially make EdkModulePkg pass intel IPF compiler with /W4 /WX switched on.

Browse Source 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2313 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
xli24
2007-01-25 06:15:58 +00:00
parent 582510249f
commit 1cc8ee7861
123 changed files with 1256 additions and 851 deletions
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20
EdkModulePkg/Bus/Pci/AtapiPassThru/Dxe/AtapiPassThru.c
View File

@@ -45,7 +45,7 @@ static IDE_BASE_REGISTERS gAtapiIoPortRegisters[2] = {
{ 0x170, { 0x171 }, 0x172, 0x173, 0x174, 0x175, 0x176, { 0x177 }, { 0x376 }, 0x377, 0 }
};
static SCSI_COMMAND_SET gEndTable = { 0xff, 0xff };
static SCSI_COMMAND_SET gEndTable = { 0xff, (DATA_DIRECTION) 0xff };
///
/// This table contains all the supported ATAPI commands.
@@ -83,7 +83,7 @@ static SCSI_COMMAND_SET gSupportedATAPICommands[] = {
{ OP_WRITE_10, DataOut },
{ OP_WRITE_12, DataOut },
{ OP_WRITE_AND_VERIFY, DataOut },
{ 0xff, 0xff }
{ 0xff, (DATA_DIRECTION) 0xff }
};
static CHAR16 *gControllerNameString = (CHAR16 *) L"ATAPI Controller";
@@ -595,14 +595,8 @@ AtapiScsiPassThruBuildDevicePath (
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
ATAPI_SCSI_PASS_THRU_DEV *AtapiScsiPrivate;
EFI_DEV_PATH *Node;
//
// Retrieve Device Private Data Structure.
//
AtapiScsiPrivate = ATAPI_SCSI_PASS_THRU_DEV_FROM_THIS (This);
//
// Validate parameters passed in.
//
@@ -995,7 +989,7 @@ SubmitBlockingIoCommand (
PacketCommand,
Packet->DataBuffer,
&(Packet->TransferLength),
Packet->DataDirection,
(DATA_DIRECTION) Packet->DataDirection,
TimeoutInMicroSeconds
);
if (!EFI_ERROR (PacketCommandStatus) || (Packet->SenseData == NULL)) {
@@ -1319,11 +1313,9 @@ AtapiPassThruPioReadWriteData (
//
// get current data transfer size from Cylinder Registers.
//
WordCount =
(
(ReadPortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->CylinderMsb) << 8) |
ReadPortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->CylinderLsb)
) & 0xffff;
WordCount = ReadPortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->CylinderMsb) << 8;
WordCount = WordCount | ReadPortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->CylinderLsb);
WordCount = WordCount & 0xffff;
WordCount /= 2;
//

3
EdkModulePkg/Bus/Pci/CirrusLogic/Dxe/CirrusLogic5430UgaDraw.c
View File

@@ -176,6 +176,7 @@ inw (
@retval EFI_SUCCESS TODO: Add description for return value
**/
STATIC
EFI_STATUS
EFIAPI
CirrusLogic5430UgaDrawGetMode (
@@ -223,6 +224,7 @@ CirrusLogic5430UgaDrawGetMode (
@retval EFI_NOT_FOUND TODO: Add description for return value
**/
STATIC
EFI_STATUS
EFIAPI
CirrusLogic5430UgaDrawSetMode (
@@ -301,6 +303,7 @@ CirrusLogic5430UgaDrawSetMode (
@retval EFI_SUCCESS TODO: Add description for return value
**/
STATIC
EFI_STATUS
EFIAPI
CirrusLogic5430UgaDrawBlt (

3
EdkModulePkg/Bus/Pci/CirrusLogic/Dxe/ComponentName.c
View File

@@ -142,7 +142,6 @@ CirrusLogic5430ComponentNameGetControllerName (
{
EFI_UGA_DRAW_PROTOCOL *UgaDraw;
EFI_STATUS Status;
CIRRUS_LOGIC_5430_PRIVATE_DATA *Private;
EFI_PCI_IO_PROTOCOL *PciIoProtocol;
//
@@ -196,8 +195,6 @@ CirrusLogic5430ComponentNameGetControllerName (
//
// Get the Cirrus Logic 5430's Device structure
//
Private = CIRRUS_LOGIC_5430_PRIVATE_DATA_FROM_UGA_DRAW_THIS (UgaDraw);
return LookupUnicodeString (
Language,
gCirrusLogic5430ComponentName.SupportedLanguages,

4
EdkModulePkg/Bus/Pci/Ehci/Dxe/Ehci.c
View File

@@ -1281,9 +1281,9 @@ EhciGetRootHubPortStatus (
// Not Low Speed Device Attached
//
if ((PORTSC_CCS & PortStatusControlReg) && (PORTSC_CSC & PortStatusControlReg)) {
HcDev->DeviceSpeed[PortNumber] = IsHighSpeedDevice (This, PortNumber) ? USB_PORT_STAT_HIGH_SPEED : 0;
HcDev->DeviceSpeed[PortNumber] = (UINT16) (IsHighSpeedDevice (This, PortNumber) ? USB_PORT_STAT_HIGH_SPEED : 0);
}
PortStatus->PortStatus |= HcDev->DeviceSpeed[PortNumber];
PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | HcDev->DeviceSpeed[PortNumber]);
}
//
// Fill Port Status Change bits

4
EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciMem.c
View File

@@ -380,7 +380,7 @@ Returns:
//
// reset associated bits in bit arry
//
for (Index = StartBytePos, Index2 = StartBitPos, Count = 0; Count < (RealAllocSize / 32); Count++) {
for (Index = StartBytePos, Index2 = StartBitPos, Count = 0; Count < (RealAllocSize / 32); Count++) {
TempHeaderPtr->BitArrayPtr[Index] = (UINT8) (TempHeaderPtr->BitArrayPtr[Index] ^ (bit (Index2)));
Index2++;
if (Index2 == 8) {
@@ -595,7 +595,7 @@ Returns:
// Set the memory as allocated
//
for (TempBytePos = FoundBytePos, Index = FoundBitPos, Count = 0; Count < NumberOfMemoryUnit; Count++) {
MemoryHeader->BitArrayPtr[TempBytePos] = (UINT8) (MemoryHeader->BitArrayPtr[TempBytePos] | (bit (Index)));
Index++;
if (Index == 8) {

4
EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciReg.c
View File

@@ -1136,7 +1136,7 @@ Returns:
&PortStatusControlReg
);
return ((PortStatusControlReg & PORTSC_PED) ? TRUE : FALSE);
return ((BOOLEAN) ((PortStatusControlReg & PORTSC_PED) ? TRUE : FALSE));
}
BOOLEAN
@@ -1347,7 +1347,7 @@ Returns:
//
gBS->Stall (EHCI_CLEAR_PORT_RESET_RECOVERY_TIME);
return (IsEhcPortEnabled (HcDev, PortNum) ? TRUE : FALSE);
return ((BOOLEAN) (IsEhcPortEnabled (HcDev, PortNum) ? TRUE : FALSE));
}
EFI_STATUS

4
EdkModulePkg/Bus/Pci/Ehci/Dxe/EhciSched.c
View File

@@ -2547,7 +2547,7 @@ Returns:
}
MatchPtr = NULL;
QhHwPtr = NULL;
QhHwPtr = NULL;
EndPointNum = (UINT8) (EndPointAddress & 0x0f);
AsyncRequestPtr = HcDev->AsyncRequestList;
@@ -2916,13 +2916,11 @@ Returns:
--*/
{
EFI_STATUS Status;
UINTN ErrQtdPos;
UINTN ErrQtdPos;
UINTN Delay;
BOOLEAN Finished;
Status = EFI_SUCCESS;
ErrQtdPos = 0;
ErrQtdPos = 0;
*TransferResult = EFI_USB_NOERROR;
*ActualLen = 0;

3
EdkModulePkg/Bus/Pci/IdeBus/Dxe/DriverConfiguration.c
View File

@@ -64,6 +64,7 @@ EFI_DRIVER_CONFIGURATION_PROTOCOL gIDEBusDriverConfiguration = {
@retval EFI_NOT_FOUND TODO: Add description for return value
**/
STATIC
EFI_STATUS
GetResponse (
VOID
@@ -190,7 +191,7 @@ IDEBusDriverConfigurationSetOptions (
}
if (!EFI_ERROR (Status)) {
NewValue |= (UINT8) (1 << Index);
NewValue = (UINT8) (NewValue | (1 << Index));
}
}

2
EdkModulePkg/Bus/Pci/IdeBus/Dxe/ata.c
View File

@@ -2073,7 +2073,7 @@ AtaCommandIssue (
Lba1 = (UINT8) RShiftU64 (LbaAddress, 8);
Lba2 = (UINT8) RShiftU64 (LbaAddress, 16);
Lba3 = (UINT8) RShiftU64 (LbaAddress, 24);
Device |= Lba3;
Device = (UINT8) (Device | Lba3);
//
// Pass parameter into device register block

15
EdkModulePkg/Bus/Pci/IdeBus/Dxe/atapi.c
View File

@@ -713,11 +713,6 @@ PioReadWriteData (
EFI_STATUS Status;
UINT16 *PtrBuffer;
//
// containing status byte read from Status Register.
//
UINT8 StatusRegister;
//
// No data transfer is premitted.
//
@@ -750,16 +745,14 @@ PioReadWriteData (
//
// read Status Register will clear interrupt
//
StatusRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
//
// get current data transfer size from Cylinder Registers.
//
WordCount =
(
(IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb) << 8) |
IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb)
) & 0xffff;
WordCount = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb) << 8;
WordCount = WordCount | IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb);
WordCount = WordCount & 0xffff;
WordCount /= 2;
WordCount = EFI_MIN (WordCount, (RequiredWordCount - ActualWordCount));

1
EdkModulePkg/Bus/Pci/IdeBus/Dxe/ide.c
View File

@@ -236,6 +236,7 @@ IDEWritePortWMultiple (
TODO: add return values
**/
STATIC
BOOLEAN
BadIdeDeviceCheck (
IN IDE_BLK_IO_DEV *IdeDev

10
EdkModulePkg/Bus/Pci/IdeBus/Dxe/idebus.c
View File

@@ -189,7 +189,6 @@ IDEBusDriverBindingStart (
EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
BOOLEAN EnumAll;
BOOLEAN ChannelEnabled;
UINT8 ChannelCount;
UINT8 MaxDevices;
EFI_IDENTIFY_DATA IdentifyData;
EFI_ATA_COLLECTIVE_MODE *SupportedModes;
@@ -239,10 +238,9 @@ IDEBusDriverBindingStart (
}
//
// Save Enumall and ChannelCount. Step7.2
// Save Enumall. Step7.2
//
EnumAll = IdeInit->EnumAll;
ChannelCount = IdeInit->ChannelCount;
//
// Consume PCI I/O protocol. Note that the OpenProtocol with _GET_PROTOCOL
@@ -453,8 +451,8 @@ IDEBusDriverBindingStart (
ZeroMem (IdeBlkIoDevicePtr, sizeof (IDE_BLK_IO_DEV));
IdeBlkIoDevicePtr->Signature = IDE_BLK_IO_DEV_SIGNATURE;
IdeBlkIoDevicePtr->Channel = IdeChannel;
IdeBlkIoDevicePtr->Device = IdeDevice;
IdeBlkIoDevicePtr->Channel = (EFI_IDE_CHANNEL) IdeChannel;
IdeBlkIoDevicePtr->Device = (EFI_IDE_DEVICE) IdeDevice;
//
// initialize Block IO interface's Media pointer
@@ -666,7 +664,7 @@ IDEBusDriverBindingStart (
//
// Record PIO mode used in private data
//
IdeBlkIoDevicePtr->PioMode = SupportedModes->PioMode.Mode;
IdeBlkIoDevicePtr->PioMode = (ATA_PIO_MODE) SupportedModes->PioMode.Mode;
//
// Set IDE controller Timing Blocks in the PCI Configuration Space

4
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c
View File

@@ -71,9 +71,9 @@ Returns:
}
if (Operation == EFI_ENABLE_REGISTER) {
OldCommand |= Command;
OldCommand = (UINT16) (OldCommand | Command);
} else if (Operation == EFI_DISABLE_REGISTER) {
OldCommand &= ~(Command);
OldCommand = (UINT16) (OldCommand & ~(Command));
} else {
OldCommand = Command;
}

5
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciEnumeratorSupport.c
View File

@@ -969,6 +969,7 @@ Returns:
}
STATIC
EFI_STATUS
ProcessOptionRomLight (
IN PCI_IO_DEVICE *PciIoDevice
@@ -1432,7 +1433,6 @@ Returns:
// TODO: BarIndex - add argument and description to function comment
{
UINT32 Value;
UINT64 BarValue64;
UINT32 OriginalValue;
UINT32 Mask;
UINT32 Data;
@@ -1441,7 +1441,6 @@ Returns:
OriginalValue = 0;
Value = 0;
BarValue64 = 0;
Status = BarExisted (
PciIoDevice,
@@ -1491,7 +1490,7 @@ Returns:
// Need to treat it as no-bar
//
if (PciIoDevice->PciBar[BarIndex].Length == 0) {
PciIoDevice->PciBar[BarIndex].BarType = 0;
PciIoDevice->PciBar[BarIndex].BarType = (PCI_BAR_TYPE) 0;
}
PciIoDevice->PciBar[BarIndex].Prefetchable = FALSE;

13
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciIo.c
View File

@@ -184,7 +184,7 @@ Returns:
Count = 1;
}
Width &= 0x03;
Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & 0x03);
if ((*Offset + Count * (UINTN)(1 << Width)) - 1 >= PciIoDevice->PciBar[BarIndex].Length) {
return EFI_INVALID_PARAMETER;
@@ -233,7 +233,7 @@ Returns:
//
// If Width is EfiPciIoWidthFillUintX then convert to EfiPciIoWidthUintX
//
Width &= 0x03;
Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & 0x03);
if (PciIoDevice->IsPciExp) {
if ((*Offset + Count * (UINTN)(1 << Width)) - 1 >= PCI_EXP_MAX_CONFIG_OFFSET) {
@@ -876,7 +876,7 @@ Returns:
}
if (PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) {
Operation = Operation + EfiPciOperationBusMasterRead64;
Operation = (EFI_PCI_IO_PROTOCOL_OPERATION) (Operation + EfiPciOperationBusMasterRead64);
}
Status = PciIoDevice->PciRootBridgeIo->Map (
@@ -1966,10 +1966,15 @@ Returns:
// TODO: PciDevice1 - add argument and description to function comment
// TODO: PciDevice2 - add argument and description to function comment
{
BOOLEAN Existed1;
BOOLEAN Existed2;
if (PciDevice1->Parent == PciDevice2->Parent) {
return TRUE;
}
return (PciDeviceExisted (PciDevice1->Parent, PciDevice2)|| PciDeviceExisted (PciDevice2->Parent, PciDevice1));
Existed1 = PciDeviceExisted (PciDevice1->Parent, PciDevice2);
Existed2 = PciDeviceExisted (PciDevice2->Parent, PciDevice1);
return (BOOLEAN) (Existed1 || Existed2);
}

3
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
View File

@@ -94,6 +94,7 @@ Returns:
EFI_NATIVE_INTERFACE,
NULL
);
ASSERT_EFI_ERROR (Status);
}
}
@@ -1446,7 +1447,7 @@ Returns:
SecondBus = 0;
Register = 0;
State = 0;
Attributes = 0;
Attributes = (EFI_HPC_PADDING_ATTRIBUTES) 0;
BusRange = 0;
ResetAllPpbBusReg (Bridge, StartBusNumber);

2
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciOptionRomSupport.c
View File

@@ -151,7 +151,6 @@ Returns:
UINT16 OffsetPcir;
UINT32 RomBarOffset;
UINT32 RomBar;
UINT64 Temp;
EFI_STATUS retStatus;
BOOLEAN FirstCheck;
UINT8 *Image;
@@ -167,7 +166,6 @@ Returns:
Indicator = 0;
RomImageSize = 0;
RomInMemory = NULL;
Temp = 0;
CodeType = 0xFF;
//

35
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciResourceSupport.c
View File

@@ -647,10 +647,8 @@ Returns:
// TODO: ResType - add argument and description to function comment
// TODO: ResUsage - add argument and description to function comment
{
EFI_STATUS Status;
PCI_RESOURCE_NODE *Node;
Status = 0;
Node = NULL;
Node = AllocatePool (sizeof (PCI_RESOURCE_NODE));
@@ -704,7 +702,6 @@ Returns:
// TODO: EFI_SUCCESS - add return value to function comment
{
PCI_IO_DEVICE *Temp;
EFI_STATUS Status;
PCI_RESOURCE_NODE *IoBridge;
PCI_RESOURCE_NODE *Mem32Bridge;
PCI_RESOURCE_NODE *PMem32Bridge;
@@ -789,14 +786,14 @@ Returns:
//
// Recursively create resouce map on this bridge
//
Status = CreateResourceMap (
Temp,
IoBridge,
Mem32Bridge,
PMem32Bridge,
Mem64Bridge,
PMem64Bridge
);
CreateResourceMap (
Temp,
IoBridge,
Mem32Bridge,
PMem32Bridge,
Mem64Bridge,
PMem64Bridge
);
if (ResourceRequestExisted (IoBridge)) {
InsertResourceNode (
@@ -895,14 +892,14 @@ Returns:
//
// To do some platform specific resource padding ...
//
Status = ResourcePaddingPolicy (
Bridge,
IoNode,
Mem32Node,
PMem32Node,
Mem64Node,
PMem64Node
);
ResourcePaddingPolicy (
Bridge,
IoNode,
Mem32Node,
PMem32Node,
Mem64Node,
PMem64Node
);
//
// Degrade resource if necessary

4
EdkModulePkg/Bus/Pci/PciBus/Dxe/PciRomTable.c
View File

@@ -101,6 +101,7 @@ Returns:
mNumberOfPciRomImages++;
}
STATIC
VOID
HexToString (
CHAR16 *String,
@@ -134,6 +135,8 @@ Returns:
}
}
}
STATIC
EFI_STATUS
PciRomLoadEfiDriversFromRomImage (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
@@ -307,6 +310,7 @@ Returns:
return retStatus;
}
STATIC
EFI_STATUS
PciRomLoadEfiDriversFromOptionRomTable (
IN EFI_DRIVER_BINDING_PROTOCOL *This,

23
EdkModulePkg/Bus/Pci/Uhci/Dxe/uhchlp.c
View File

@@ -21,6 +21,7 @@ Revision History
#include "uhci.h"
STATIC
EFI_STATUS
USBReadPortW (
IN EFI_PCI_IO_PROTOCOL *PciIo,
@@ -58,6 +59,7 @@ Returns:
);
}
STATIC
EFI_STATUS
USBReadPortDW (
IN EFI_PCI_IO_PROTOCOL *PciIo,
@@ -95,6 +97,7 @@ Returns:
);
}
STATIC
EFI_STATUS
USBWritePortW (
IN EFI_PCI_IO_PROTOCOL *PciIo,
@@ -132,6 +135,7 @@ Returns:
);
}
STATIC
EFI_STATUS
USBWritePortDW (
IN EFI_PCI_IO_PROTOCOL *PciIo,
@@ -654,13 +658,12 @@ Returns:
--*/
{
UINT16 CommandContent;
EFI_STATUS Status;
Status = ReadUHCCommandReg (
HcDev->PciIo,
(UINT32) (USBCMD),
&CommandContent
);
ReadUHCCommandReg (
HcDev->PciIo,
(UINT32) (USBCMD),
&CommandContent
);
if ((CommandContent & USBCMD_MAXP) != USBCMD_MAXP) {
CommandContent |= USBCMD_MAXP;
@@ -835,6 +838,7 @@ Returns:
//
// functions for QH
//
STATIC
EFI_STATUS
AllocateQHStruct (
IN USB_HC_DEV *HcDev,
@@ -1196,6 +1200,7 @@ Returns:
return (BOOLEAN) (!(PtrQH->QH.QHVerticalTerminate));
}
STATIC
BOOLEAN
GetQHHorizontalValidorInvalid (
IN QH_STRUCT *PtrQH
@@ -1769,6 +1774,7 @@ Returns:
return (VOID *) ((UINTN) (ptrTDStruct->TDData.TDLinkPtr << 4));
}
STATIC
BOOLEAN
IsTDLinkPtrQHOrTD (
IN TD_STRUCT *ptrTDStruct
@@ -2325,6 +2331,7 @@ SetCurFrameListQHorTD (
pCurEntry->FrameListPtrQSelect = (IsQH ? 1 : 0);
}
STATIC
BOOLEAN
IsCurFrameListQHorTD (
IN FRAMELIST_ENTRY *pCurEntry
@@ -3854,7 +3861,7 @@ Returns:
//
for (Index = StartBytePos, Index2 = StartBitPos, Count = 0; Count < (RealAllocSize / 32); Count++) {
TempHeaderPtr->BitArrayPtr[Index] ^= (UINT8) (bit (Index2));
TempHeaderPtr->BitArrayPtr[Index] = (UINT8) (TempHeaderPtr->BitArrayPtr[Index] ^ bit (Index2));
Index2++;
if (Index2 == 8) {
Index += 1;
@@ -4067,7 +4074,7 @@ Returns:
for (TempBytePos = FoundBytePos, Index = FoundBitPos,Count = 0;
Count < NumberOfMemoryUnit; Count ++) {
MemoryHeader->BitArrayPtr[TempBytePos] |= bit (Index);
MemoryHeader->BitArrayPtr[TempBytePos] = (UINT8) (MemoryHeader->BitArrayPtr[TempBytePos] | bit (Index));
Index++;
if (Index == 8) {
TempBytePos += 1;

10
EdkModulePkg/Bus/Pci/Uhci/Dxe/uhci.c
View File

@@ -759,7 +759,7 @@ UHCIDriverBindingStart (
return EFI_SUCCESS;
}
STATIC
EFI_STATUS
UnInstallUHCInterface (
IN EFI_HANDLE Controller,
@@ -3845,7 +3845,7 @@ UHCI2ControlTransfer (
--*/
{
USB_HC_DEV *HcDev;
BOOLEAN IsSlowDevice = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
BOOLEAN IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
HcDev = USB2_HC_DEV_FROM_THIS (This);
@@ -4056,7 +4056,7 @@ UHCI2AsyncInterruptTransfer (
--*/
{
USB_HC_DEV *HcDev;
BOOLEAN IsSlowDevice = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
BOOLEAN IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
HcDev = USB2_HC_DEV_FROM_THIS (This);
return UHCIAsyncInterruptTransfer(
@@ -4155,7 +4155,7 @@ UHCI2SyncInterruptTransfer (
if(DeviceSpeed==EFI_USB_SPEED_HIGH)
return EFI_INVALID_PARAMETER;
IsSlowDevice = (EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE;
IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);
HcDev = USB2_HC_DEV_FROM_THIS (This);
return UHCISyncInterruptTransfer(
@@ -4437,11 +4437,9 @@ MonitorInterruptTrans (
UINTN DataLen;
UINTN ActualLen;
UINTN ErrTDPos;
UINT32 StatusAddr;
LIST_ENTRY *NextLink;
HcDev = (USB_HC_DEV *) Context;
StatusAddr = (UINT32) (USBSTS);
//
// interrupt transfer list is empty, means that no interrupt transfer