Partially make EdkModulePkg pass intel IPF compiler with /W4 /WX switched on.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2313 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -64,6 +64,7 @@ EFI_DRIVER_CONFIGURATION_PROTOCOL gIDEBusDriverConfiguration = {
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@retval EFI_NOT_FOUND TODO: Add description for return value
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**/
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STATIC
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EFI_STATUS
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GetResponse (
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VOID
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@@ -190,7 +191,7 @@ IDEBusDriverConfigurationSetOptions (
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}
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if (!EFI_ERROR (Status)) {
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NewValue |= (UINT8) (1 << Index);
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NewValue = (UINT8) (NewValue | (1 << Index));
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}
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}
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@@ -2073,7 +2073,7 @@ AtaCommandIssue (
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Lba1 = (UINT8) RShiftU64 (LbaAddress, 8);
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Lba2 = (UINT8) RShiftU64 (LbaAddress, 16);
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Lba3 = (UINT8) RShiftU64 (LbaAddress, 24);
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Device |= Lba3;
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Device = (UINT8) (Device | Lba3);
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//
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// Pass parameter into device register block
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@@ -713,11 +713,6 @@ PioReadWriteData (
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EFI_STATUS Status;
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UINT16 *PtrBuffer;
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//
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// containing status byte read from Status Register.
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//
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UINT8 StatusRegister;
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//
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// No data transfer is premitted.
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//
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@@ -750,16 +745,14 @@ PioReadWriteData (
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//
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// read Status Register will clear interrupt
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//
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StatusRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
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IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
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//
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// get current data transfer size from Cylinder Registers.
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//
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WordCount =
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(
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(IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb) << 8) |
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IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb)
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) & 0xffff;
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WordCount = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb) << 8;
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WordCount = WordCount | IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb);
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WordCount = WordCount & 0xffff;
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WordCount /= 2;
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WordCount = EFI_MIN (WordCount, (RequiredWordCount - ActualWordCount));
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@@ -236,6 +236,7 @@ IDEWritePortWMultiple (
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TODO: add return values
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**/
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STATIC
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BOOLEAN
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BadIdeDeviceCheck (
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IN IDE_BLK_IO_DEV *IdeDev
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@@ -189,7 +189,6 @@ IDEBusDriverBindingStart (
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EFI_IDE_CONTROLLER_INIT_PROTOCOL *IdeInit;
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BOOLEAN EnumAll;
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BOOLEAN ChannelEnabled;
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UINT8 ChannelCount;
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UINT8 MaxDevices;
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EFI_IDENTIFY_DATA IdentifyData;
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EFI_ATA_COLLECTIVE_MODE *SupportedModes;
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@@ -239,10 +238,9 @@ IDEBusDriverBindingStart (
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}
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//
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// Save Enumall and ChannelCount. Step7.2
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// Save Enumall. Step7.2
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//
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EnumAll = IdeInit->EnumAll;
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ChannelCount = IdeInit->ChannelCount;
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//
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// Consume PCI I/O protocol. Note that the OpenProtocol with _GET_PROTOCOL
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@@ -453,8 +451,8 @@ IDEBusDriverBindingStart (
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ZeroMem (IdeBlkIoDevicePtr, sizeof (IDE_BLK_IO_DEV));
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IdeBlkIoDevicePtr->Signature = IDE_BLK_IO_DEV_SIGNATURE;
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IdeBlkIoDevicePtr->Channel = IdeChannel;
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IdeBlkIoDevicePtr->Device = IdeDevice;
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IdeBlkIoDevicePtr->Channel = (EFI_IDE_CHANNEL) IdeChannel;
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IdeBlkIoDevicePtr->Device = (EFI_IDE_DEVICE) IdeDevice;
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//
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// initialize Block IO interface's Media pointer
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@@ -666,7 +664,7 @@ IDEBusDriverBindingStart (
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//
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// Record PIO mode used in private data
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//
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IdeBlkIoDevicePtr->PioMode = SupportedModes->PioMode.Mode;
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IdeBlkIoDevicePtr->PioMode = (ATA_PIO_MODE) SupportedModes->PioMode.Mode;
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//
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// Set IDE controller Timing Blocks in the PCI Configuration Space
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