Add ArmPlatformPkg from ARM Ltd. patch.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11291 6f19259b-4bc3-4df7-8a09-765794883524
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63
ArmPlatformPkg/Include/Drivers/PL011Uart.h
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63
ArmPlatformPkg/Include/Drivers/PL011Uart.h
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/** @file
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __PL011_UART_H__
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#define __PL011_UART_H__
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#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
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// PL011 Registers
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#define UARTDR 0x000
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#define UARTRSR 0x004
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#define UARTECR 0x004
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#define UARTFR 0x018
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#define UARTILPR 0x020
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#define UARTIBRD 0x024
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#define UARTFBRD 0x028
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#define UARTLCR_H 0x02C
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#define UARTCR 0x030
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#define UARTIFLS 0x034
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#define UARTIMSC 0x038
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#define UARTRIS 0x03C
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#define UARTMIS 0x040
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#define UARTICR 0x044
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#define UARTDMACR 0x048
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#define UART_115200_IDIV 13 // Integer Part
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#define UART_115200_FDIV 1 // Fractional Part
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#define UART_38400_IDIV 39
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#define UART_38400_FDIV 5
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#define UART_19200_IDIV 12
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#define UART_19200_FDIV 37
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// data status bits
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#define UART_DATA_ERROR_MASK 0x0F00
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// status reg bits
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#define UART_STATUS_ERROR_MASK 0x0F
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// flag reg bits
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#define UART_TX_EMPTY_FLAG_MASK 0x80
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#define UART_RX_FULL_FLAG_MASK 0x40
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#define UART_TX_FULL_FLAG_MASK 0x20
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#define UART_RX_EMPTY_FLAG_MASK 0x10
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#define UART_BUSY_FLAG_MASK 0x08
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// control reg bits
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#define UART_CTSEN_CONTROL_MASK 0x8000
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#define UART_RTSEN_CONTROL_MASK 0x4000
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#define UART_RTS_CONTROL_MASK 0x0800
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#define UART_DTR_CONTROL_MASK 0x0400
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#endif
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50
ArmPlatformPkg/Include/Drivers/SP804Timer.h
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50
ArmPlatformPkg/Include/Drivers/SP804Timer.h
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/** @file
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef _SP804_TIMER_H__
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#define _SP804_TIMER_H__
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// SP804 Timer constants
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#define SP804_TIMER_LOAD_REG 0x00
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#define SP804_TIMER_CURRENT_REG 0x04
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#define SP804_TIMER_CONTROL_REG 0x08
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#define SP804_TIMER_INT_CLR_REG 0x0C
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#define SP804_TIMER_RAW_INT_STS_REG 0x10
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#define SP804_TIMER_MSK_INT_STS_REG 0x14
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#define SP804_TIMER_BG_LOAD_REG 0x18
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// Timer control register bit definitions
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#define SP804_TIMER_CTRL_ONESHOT BIT0
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#define SP804_TIMER_CTRL_32BIT BIT1
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#define SP804_TIMER_CTRL_PRESCALE_MASK (BIT3|BIT2)
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#define SP804_PRESCALE_DIV_1 0
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#define SP804_PRESCALE_DIV_16 BIT2
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#define SP804_PRESCALE_DIV_256 BIT3
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#define SP804_TIMER_CTRL_INT_ENABLE BIT5
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#define SP804_TIMER_CTRL_PERIODIC BIT6
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#define SP804_TIMER_CTRL_ENABLE BIT7
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// SP810 System Controller constants
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#define SP810_SYS_CTRL_REG 0x00
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#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK
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#define SP810_SYS_CTRL_TIMER0_EN BIT16
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#define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=REFCLK, 1=TIMCLK
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#define SP810_SYS_CTRL_TIMER1_EN BIT18
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#define SP810_SYS_CTRL_TIMER2_TIMCLK BIT19 // 0=REFCLK, 1=TIMCLK
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#define SP810_SYS_CTRL_TIMER2_EN BIT20
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#define SP810_SYS_CTRL_TIMER3_TIMCLK BIT21 // 0=REFCLK, 1=TIMCLK
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#define SP810_SYS_CTRL_TIMER3_EN BIT22
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#endif
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