Add ArmPlatformPkg from ARM Ltd. patch.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11291 6f19259b-4bc3-4df7-8a09-765794883524
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193
ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c
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193
ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c
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/** @file
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Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/BaseLib.h>
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#include <Library/TimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Drivers/SP804Timer.h>
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#include <ArmPlatform.h>
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// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
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// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
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RETURN_STATUS
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EFIAPI
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TimerConstructor (
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VOID
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)
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{
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// Check if Timer 2 is already initialized
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if (MmioRead32(SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
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return RETURN_SUCCESS;
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} else {
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// configure SP810 to use 1MHz clock and disable
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MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
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// configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
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MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
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// preload the timer count register
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MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
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// enable the timer
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MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
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}
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// Check if Timer 3 is already initialized
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if (MmioRead32(SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
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return RETURN_SUCCESS;
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} else {
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// configure SP810 to use 1MHz clock and disable
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MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
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// configure timer 3 for free running operation, 32 bits, no prescaler, interrupt disabled
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MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
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// enable the timer
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MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
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}
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return RETURN_SUCCESS;
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}
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/**
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Stalls the CPU for at least the given number of microseconds.
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Stalls the CPU for the number of microseconds specified by MicroSeconds.
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@param MicroSeconds The minimum number of microseconds to delay.
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@return The value of MicroSeconds inputted.
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**/
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UINTN
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EFIAPI
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MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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// load the timer count register
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MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
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while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
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;
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}
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return MicroSeconds;
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}
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/**
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Stalls the CPU for at least the given number of nanoseconds.
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Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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@param NanoSeconds The minimum number of nanoseconds to delay.
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@return The value of NanoSeconds inputted.
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**/
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UINTN
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EFIAPI
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NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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UINT32 MicroSeconds;
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// Round up to 1us Tick Number
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MicroSeconds = (UINT32)NanoSeconds / 1000;
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MicroSeconds += ((UINT32)NanoSeconds % 1000) == 0 ? 0 : 1;
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// load the timer count register
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MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
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while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
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;
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}
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return NanoSeconds;
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}
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/**
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Retrieves the current value of a 64-bit free running performance counter.
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The counter can either count up by 1 or count down by 1. If the physical
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performance counter counts by a larger increment, then the counter values
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must be translated. The properties of the counter can be retrieved from
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GetPerformanceCounterProperties().
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@return The current value of the free running performance counter.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounter (
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VOID
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)
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{
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// Free running 64-bit/32-bit counter is needed here.
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// Don't think we need this to boot, just to do performance profile
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// ASSERT (FALSE);
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UINT32 val = MmioRead32 (SP804_TIMER3_BASE + SP804_TIMER_CURRENT_REG);
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ASSERT(val > 0);
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return (UINT64)val;
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}
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/**
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Retrieves the 64-bit frequency in Hz and the range of performance counter
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values.
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If StartValue is not NULL, then the value that the performance counter starts
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with immediately after is it rolls over is returned in StartValue. If
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EndValue is not NULL, then the value that the performance counter end with
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immediately before it rolls over is returned in EndValue. The 64-bit
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frequency of the performance counter in Hz is always returned. If StartValue
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is less than EndValue, then the performance counter counts up. If StartValue
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is greater than EndValue, then the performance counter counts down. For
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example, a 64-bit free running counter that counts up would have a StartValue
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of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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@param StartValue The value the performance counter starts with when it
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rolls over.
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@param EndValue The value that the performance counter ends with before
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it rolls over.
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@return The frequency in Hz.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounterProperties (
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OUT UINT64 *StartValue, OPTIONAL
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OUT UINT64 *EndValue OPTIONAL
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)
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{
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if (StartValue != NULL) {
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// Timer starts with the reload value
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*StartValue = (UINT64)0ULL;
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}
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if (EndValue != NULL) {
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// Timer counts up to 0xFFFFFFFF
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*EndValue = 0xFFFFFFFF;
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}
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return 1000000;
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}
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37
ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf
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37
ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf
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@@ -0,0 +1,37 @@
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#/** @file
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# Timer library implementation
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#
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#
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# Copyright (c) 2010, ARM Ltd. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = SP804TimerLib
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FILE_GUID = 09cefa99-0d07-487f-a651-fb44f094b1c7
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = TimerLib
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CONSTRUCTOR = TimerConstructor
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[Sources.common]
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SP804TimerLib.c
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[Packages]
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MdePkg/MdePkg.dec
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ArmPkg/ArmPkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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[LibraryClasses]
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DebugLib
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IoLib
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BaseLib
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