UefiCpuPkg/MpInitLib: Avoid call PcdGet* in Ap & Bsp.
MicrocodeDetect function will run by every threads, and it will use PcdGet to get PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize, if change both PCD default to dynamic, system will in non-deterministic behavior. By design, UEFI/PI services are single threaded and not re-entrant so Multi processor code should not use UEFI/PI services. Here, Pcd protocol/PPI is used to access dynamic PCDs so it would result in non-deterministic behavior. This code get PCD value in BSP and save them in CPU_MP_DATA for Ap. https://bugzilla.tianocore.org/show_bug.cgi?id=726 Cc: Crystal Lee <CrystalLee@ami.com.tw> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Implementation of loading microcode on processors.
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Implementation of loading microcode on processors.
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -42,8 +42,6 @@ MicrocodeDetect (
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IN CPU_MP_DATA *CpuMpData
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IN CPU_MP_DATA *CpuMpData
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)
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)
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{
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{
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UINT64 MicrocodePatchAddress;
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UINT64 MicrocodePatchRegionSize;
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UINT32 ExtendedTableLength;
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UINT32 ExtendedTableLength;
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UINT32 ExtendedTableCount;
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UINT32 ExtendedTableCount;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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@ -61,9 +59,7 @@ MicrocodeDetect (
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VOID *MicrocodeData;
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VOID *MicrocodeData;
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
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if (CpuMpData->MicrocodePatchRegionSize == 0) {
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MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
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if (MicrocodePatchRegionSize == 0) {
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//
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//
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// There is no microcode patches
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// There is no microcode patches
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//
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//
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@ -93,8 +89,8 @@ MicrocodeDetect (
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LatestRevision = 0;
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LatestRevision = 0;
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MicrocodeData = NULL;
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MicrocodeData = NULL;
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MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);
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MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;
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do {
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do {
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//
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//
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// Check if the microcode is for the Cpu and the version is newer
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// Check if the microcode is for the Cpu and the version is newer
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@ -1458,6 +1458,8 @@ MpInitLibInitialize (
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CpuMpData->SwitchBspFlag = FALSE;
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CpuMpData->SwitchBspFlag = FALSE;
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CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
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CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
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CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
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CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
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CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
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CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
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InitializeSpinLock(&CpuMpData->MpLock);
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InitializeSpinLock(&CpuMpData->MpLock);
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//
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//
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// Save BSP's Control registers to APs
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// Save BSP's Control registers to APs
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@ -233,6 +233,8 @@ struct _CPU_MP_DATA {
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UINT8 Vector;
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UINT8 Vector;
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BOOLEAN PeriodicMode;
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BOOLEAN PeriodicMode;
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BOOLEAN TimerInterruptState;
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BOOLEAN TimerInterruptState;
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UINT64 MicrocodePatchAddress;
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UINT64 MicrocodePatchRegionSize;
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};
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};
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extern EFI_GUID mCpuInitMpLibHobGuid;
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extern EFI_GUID mCpuInitMpLibHobGuid;
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