ARM Packages: Fixed line endings
This large code change only modifies the line endings to be CRLF to be compliant with the EDK2 coding convention document. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,49 +1,49 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(__ctzsi2)
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ASM_PFX(__ctzsi2):
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uxth r3, r0
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cmp r3, #0
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moveq ip, #16
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movne ip, #0
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@ lr needed for prologue
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mov r0, r0, lsr ip
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tst r0, #255
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movne r3, #0
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moveq r3, #8
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mov r0, r0, lsr r3
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tst r0, #15
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movne r1, #0
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moveq r1, #4
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add r3, r3, ip
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mov r0, r0, lsr r1
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tst r0, #3
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movne r2, #0
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moveq r2, #2
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add r3, r3, r1
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mov r0, r0, lsr r2
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and r0, r0, #3
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add r2, r3, r2
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eor r3, r0, #1
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mov r0, r0, lsr #1
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ands r3, r3, #1
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mvnne r3, #0
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rsb r0, r0, #2
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and r0, r3, r0
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add r0, r2, r0
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bx lr
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(__ctzsi2)
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ASM_PFX(__ctzsi2):
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uxth r3, r0
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cmp r3, #0
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moveq ip, #16
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movne ip, #0
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@ lr needed for prologue
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mov r0, r0, lsr ip
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tst r0, #255
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movne r3, #0
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moveq r3, #8
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mov r0, r0, lsr r3
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tst r0, #15
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movne r1, #0
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moveq r1, #4
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add r3, r3, ip
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mov r0, r0, lsr r1
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tst r0, #3
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movne r2, #0
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moveq r2, #2
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add r3, r3, r1
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mov r0, r0, lsr r2
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and r0, r0, #3
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add r2, r3, r2
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eor r3, r0, #1
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mov r0, r0, lsr #1
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ands r3, r3, #1
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mvnne r3, #0
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rsb r0, r0, #2
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and r0, r3, r0
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add r0, r2, r0
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bx lr
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