ARM Packages: Fixed line endings
This large code change only modifies the line endings to be CRLF to be compliant with the EDK2 coding convention document. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,46 +1,46 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(__moddi3)
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ASM_PFX(__moddi3):
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stmfd sp!, {r4, r5, r7, lr}
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mov r4, r1, asr #31
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add r7, sp, #8
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stmfd sp!, {r10, r11}
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mov r10, r3, asr #31
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sub sp, sp, #16
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mov r5, r4
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mov r11, r10
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eor r0, r0, r4
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eor r1, r1, r4
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eor r2, r2, r10
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eor r3, r3, r10
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add ip, sp, #8
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subs r0, r0, r4
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sbc r1, r1, r5
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subs r2, r2, r10
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sbc r3, r3, r11
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str ip, [sp, #0]
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bl ASM_PFX(__udivmoddi4)
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ldrd r0, [sp, #8]
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eor r0, r0, r4
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eor r1, r1, r4
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subs r0, r0, r4
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sbc r1, r1, r5
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sub sp, r7, #16
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ldmfd sp!, {r10, r11}
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ldmfd sp!, {r4, r5, r7, pc}
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(__moddi3)
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ASM_PFX(__moddi3):
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stmfd sp!, {r4, r5, r7, lr}
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mov r4, r1, asr #31
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add r7, sp, #8
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stmfd sp!, {r10, r11}
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mov r10, r3, asr #31
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sub sp, sp, #16
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mov r5, r4
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mov r11, r10
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eor r0, r0, r4
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eor r1, r1, r4
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eor r2, r2, r10
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eor r3, r3, r10
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add ip, sp, #8
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subs r0, r0, r4
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sbc r1, r1, r5
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subs r2, r2, r10
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sbc r3, r3, r11
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str ip, [sp, #0]
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bl ASM_PFX(__udivmoddi4)
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ldrd r0, [sp, #8]
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eor r0, r0, r4
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eor r1, r1, r4
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subs r0, r0, r4
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sbc r1, r1, r5
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sub sp, r7, #16
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ldmfd sp!, {r10, r11}
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ldmfd sp!, {r4, r5, r7, pc}
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