MdePkg/BaseLib: Remove .S files for IA32 and X64 arch

.nasm file has been added for X86 arch. .S assembly code
is not required any more.
https://bugzilla.tianocore.org/show_bug.cgi?id=1594

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Shenglei Zhang
2019-03-07 09:01:03 +08:00
committed by Liming Gao
parent 4eea7627ef
commit 1ee58b7103
39 changed files with 0 additions and 2412 deletions

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@@ -1,43 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# ARShiftU64.S
#
# Abstract:
#
# 64-bit arithmetic right shift function for IA-32
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathARShiftU64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathARShiftU64 (
# IN UINT64 Operand,
# IN UINTN Count
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathARShiftU64):
movb 12(%esp), %cl
movl 8(%esp), %eax
cltd
testb $32, %cl
jnz L0
movl %eax, %edx
movl 4(%esp), %eax
L0:
shrdl %cl, %edx, %eax
sar %cl, %edx
ret

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@@ -1,63 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuId.S
#
# Abstract:
#
# AsmCpuid function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmCpuid)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmCpuid (
# IN UINT32 RegisterInEax,
# OUT UINT32 *RegisterOutEax OPTIONAL,
# OUT UINT32 *RegisterOutEbx OPTIONAL,
# OUT UINT32 *RegisterOutEcx OPTIONAL,
# OUT UINT32 *RegisterOutEdx OPTIONAL
# )
#------------------------------------------------------------------------------
ASM_PFX(AsmCpuid):
push %ebx
push %ebp
movl %esp, %ebp
movl 12(%ebp), %eax
cpuid
push %ecx
movl 16(%ebp), %ecx
jecxz L1
movl %eax, (%ecx)
L1:
movl 20(%ebp), %ecx
jecxz L2
movl %ebx, (%ecx)
L2:
movl 24(%ebp), %ecx
jecxz L3
popl (%ecx)
L3:
movl 28(%ebp), %ecx
jecxz L4
movl %edx, (%ecx)
L4:
movl 12(%ebp), %eax
leave
pop %ebx
ret

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@@ -1,67 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuIdEx.S
#
# Abstract:
#
# AsmCpuidEx function
#
# Notes:
#
#------------------------------------------------------------------------------
.code:
#------------------------------------------------------------------------------
# UINT32
# EFIAPI
# AsmCpuidEx (
# IN UINT32 RegisterInEax,
# IN UINT32 RegisterInEcx,
# OUT UINT32 *RegisterOutEax OPTIONAL,
# OUT UINT32 *RegisterOutEbx OPTIONAL,
# OUT UINT32 *RegisterOutEcx OPTIONAL,
# OUT UINT32 *RegisterOutEdx OPTIONAL
# )
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmCpuidEx)
ASM_PFX(AsmCpuidEx):
push %ebx
push %ebp
movl %esp, %ebp
movl 12(%ebp), %eax
movl 16(%ebp), %ecx
cpuid
push %ecx
movl 20(%ebp), %ecx
jecxz L1
movl %eax, (%ecx)
L1:
movl 24(%ebp), %ecx
jecxz L2
movl %ebx, (%ecx)
L2:
movl 32(%ebp), %ecx
jecxz L3
movl %edx, (%ecx)
L3:
movl 28(%ebp), %ecx
jecxz L4
popl (%ecx)
L4:
movl 12(%ebp), %eax
leave
pop %ebx
ret

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@@ -1,39 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DisableCache.S
#
# Abstract:
#
# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
# WBINVD instruction.
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmDisableCache (
# VOID
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmDisableCache)
ASM_PFX(AsmDisableCache):
movl %cr0, %eax
btsl $30, %eax
btrl $29, %eax
movl %eax, %cr0
wbinvd
ret

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@@ -1,52 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DisablePaging32.S
#
# Abstract:
#
# InternalX86DisablePaging32 function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86DisablePaging32)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalX86DisablePaging32 (
# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
# IN VOID *Context1, OPTIONAL
# IN VOID *Context2, OPTIONAL
# IN VOID *NewStack
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalX86DisablePaging32):
movl 4(%esp), %ebx
movl 8(%esp), %ecx
movl 12(%esp), %edx
pushfl
pop %edi # save EFLAGS to edi
cli
movl %cr0, %eax
btrl $31, %eax
movl 16(%esp), %esp
movl %eax, %cr0
push %edi
popfl # restore EFLAGS from edi
push %edx
push %ecx
call *%ebx
jmp . # EntryPoint() should not return

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@@ -1,41 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DivU64x32.S
#
# Abstract:
#
# Calculate the quotient of a 64-bit integer by a 32-bit integer
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathDivU64x32)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathDivU64x32 (
# IN UINT64 Dividend,
# IN UINT32 Divisor
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathDivU64x32):
movl 8(%esp), %eax
movl 12(%esp), %ecx
xorl %edx, %edx
divl %ecx
push %eax # save quotient on stack
movl 8(%esp), %eax
divl %ecx
pop %edx # restore high-order dword of the quotient
ret

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@@ -1,46 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DivError.S
#
# Abstract:
#
# Set error flag for all division functions
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathDivRemU64x32 (
# IN UINT64 Dividend,
# IN UINT32 Divisor,
# OUT UINT32 *Remainder
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathDivRemU64x32):
movl 12(%esp), %ecx # ecx <- divisor
movl 8(%esp), %eax # eax <- dividend[32..63]
xorl %edx, %edx
divl %ecx # eax <- quotient[32..63], edx <- remainder
push %eax
movl 8(%esp), %eax # eax <- dividend[0..31]
divl %ecx # eax <- quotient[0..31]
movl 20(%esp), %ecx # ecx <- Remainder
jecxz L1 # abandon remainder if Remainder == NULL
movl %edx, (%ecx)
L1:
pop %edx # edx <- quotient[32..63]
ret

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@@ -1,89 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DivU64x64Remainder.S
#
# Abstract:
#
# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
# both the quotient and the remainder
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathDivRemU64x64 (
# IN UINT64 Dividend,
# IN UINT64 Divisor,
# OUT UINT64 *Remainder OPTIONAL
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathDivRemU64x64):
movl 16(%esp), %ecx # ecx <- divisor[32..63]
testl %ecx, %ecx
jnz Hard # call _@DivRemU64x64 if Divisor > 2^32
movl 20(%esp), %ecx
jecxz L1
andl $0, 4(%ecx) # zero high dword of remainder
movl %ecx, 16(%esp) # set up stack frame to match DivRemU64x32
L1:
jmp ASM_PFX(InternalMathDivRemU64x32)
Hard:
push %ebx
push %esi
push %edi
mov 20(%esp), %edx
mov 16(%esp), %eax # edx:eax <- dividend
movl %edx, %edi
movl %eax, %esi # edi:esi <- dividend
mov 24(%esp), %ebx # ecx:ebx <- divisor
L2:
shrl %edx
rcrl $1, %eax
shrdl $1, %ecx, %ebx
shrl %ecx
jnz L2
divl %ebx
movl %eax, %ebx # ebx <- quotient
movl 28(%esp), %ecx # ecx <- high dword of divisor
mull 24(%esp) # edx:eax <- quotient * divisor[0..31]
imull %ebx, %ecx # ecx <- quotient * divisor[32..63]
addl %ecx, %edx # edx <- (quotient * divisor)[32..63]
mov 32(%esp), %ecx # ecx <- addr for Remainder
jc TooLarge # product > 2^64
cmpl %edx, %edi # compare high 32 bits
ja Correct
jb TooLarge # product > dividend
cmpl %eax, %esi
jae Correct # product <= dividend
TooLarge:
decl %ebx # adjust quotient by -1
jecxz Return # return if Remainder == NULL
sub 24(%esp), %eax
sbb 28(%esp), %edx # edx:eax <- (quotient - 1) * divisor
Correct:
jecxz Return
subl %eax, %esi
sbbl %edx, %edi # edi:esi <- remainder
movl %esi, (%ecx)
movl %edi, 4(%ecx)
Return:
movl %ebx, %eax # eax <- quotient
xorl %edx, %edx # quotient is 32 bits long
pop %edi
pop %esi
pop %ebx
ret

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@@ -1,39 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnableCache.S
#
# Abstract:
#
# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
# the NW bit of CR0 to 0
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# AsmEnableCache (
# VOID
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmEnableCache)
ASM_PFX(AsmEnableCache):
wbinvd
movl %cr0, %eax
btrl $30, %eax
btrl $29, %eax
movl %eax, %cr0
ret

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@@ -1,36 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnableDisableInterrupts.S
#
# Abstract:
#
# EnableDisableInterrupts function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(EnableDisableInterrupts)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# EnableDisableInterrupts (
# VOID
# );
#------------------------------------------------------------------------------
ASM_PFX(EnableDisableInterrupts):
sti
cli
ret

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@@ -1,52 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnablePaging32.S
#
# Abstract:
#
# InternalX86EnablePaging32 function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86EnablePaging32)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalX86EnablePaging32 (
# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
# IN VOID *Context1, OPTIONAL
# IN VOID *Context2, OPTIONAL
# IN VOID *NewStack
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalX86EnablePaging32):
movl 4(%esp), %ebx
movl 8(%esp), %ecx
movl 12(%esp), %edx
pushfl
pop %edi # save flags in edi
cli
movl %cr0, %eax
btsl $31, %eax
movl 16(%esp), %esp
movl %eax, %cr0
push %edi
popfl # restore flags
push %edx
push %ecx
call *%ebx
jmp .

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@@ -1,63 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# EnablePaging64.S
#
# Abstract:
#
# InternalX86EnablePaging64 function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86EnablePaging64)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalX86EnablePaging64 (
# IN UINT16 CodeSelector,
# IN UINT64 EntryPoint,
# IN UINT64 Context1, OPTIONAL
# IN UINT64 Context2, OPTIONAL
# IN UINT64 NewStack
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalX86EnablePaging64):
cli
movl $LongStart, (%esp) # offset for far retf, seg is the 1st arg
movl %cr4, %eax
orb $0x20, %al
movl %eax, %cr4 # enable PAE
movl $0xc0000080, %ecx
rdmsr
orb $1, %ah # set LME
wrmsr
movl %cr0, %eax
btsl $31, %eax # set PG
movl %eax, %cr0 # enable paging
lret # topmost 2 dwords hold the address
LongStart: # long mode starts here
.byte 0x67, 0x48 # 32-bit address size, 64-bit operand size
movl (%esp), %ebx # mov rbx, [esp]
.byte 0x67, 0x48
movl 8(%esp), %ecx # mov rcx, [esp + 8]
.byte 0x67, 0x48
movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
.byte 0x67, 0x48
movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
.byte 0x48
addl $-0x20, %esp # add rsp, -20h
call *%ebx # call rbx
jmp . # no one should get here

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@@ -1,48 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2011, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# InternalSwitchStack.S
#
# Abstract:
#
# Implementation of a stack switch on IA-32.
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalSwitchStack)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalSwitchStack (
# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
# IN VOID *Context1, OPTIONAL
# IN VOID *Context2, OPTIONAL
# IN VOID *NewStack
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalSwitchStack):
pushl %ebp
movl %esp, %ebp
movl 20(%ebp), %esp # switch stack
subl $8, %esp
movl 16(%ebp), %eax
movl %eax, 4(%esp)
movl 12(%ebp), %eax
movl %eax, (%esp)
pushl $0 # keeps gdb from unwinding stack
jmp *8(%ebp) # call and never return

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@@ -1,48 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# LRotU64.S
#
# Abstract:
#
# 64-bit left rotation for Ia32
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathLRotU64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathLRotU64 (
# IN UINT64 Operand,
# IN UINTN Count
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathLRotU64):
push %ebx
movb 16(%esp), %cl
movl 12(%esp), %edx
movl 8(%esp), %eax
shldl %cl, %edx, %ebx
shldl %cl, %eax, %edx
rorl %cl, %ebx
shldl %cl, %ebx, %eax
testb $32, %cl # Count >= 32?
jz L0
movl %eax, %ecx
movl %edx, %eax
movl %ecx, %edx
L0:
pop %ebx
ret

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@@ -1,43 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# LShiftU64.S
#
# Abstract:
#
# 64-bit left shift function for IA-32
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathLShiftU64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathLShiftU64 (
# IN UINT64 Operand,
# IN UINTN Count
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathLShiftU64):
movb 12(%esp), %cl
xorl %eax, %eax
movl 4(%esp), %edx
testb $32, %cl # Count >= 32?
jnz L0
movl %edx, %eax
movl 0x8(%esp), %edx
L0:
shld %cl, %eax, %edx
shl %cl, %eax
ret

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@@ -1,41 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# LongJump.S
#
# Abstract:
#
# Implementation of _LongJump() on IA-32.
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalLongJump)
#------------------------------------------------------------------------------
# VOID
# EFIAPI
# InternalLongJump (
# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
# IN UINTN Value
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalLongJump):
pop %eax # skip return address
pop %edx # edx <- JumpBuffer
pop %eax # eax <- Value
movl (%edx), %ebx
movl 4(%edx), %esi
movl 8(%edx), %edi
movl 12(%edx), %ebp
movl 16(%edx), %esp
jmp *20(%edx) # restore "eip"

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@@ -1,40 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# DivU64x32.S
#
# Abstract:
#
# Calculate the remainder of a 64-bit integer by a 32-bit integer
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathModU64x32)
#------------------------------------------------------------------------------
# UINT32
# EFIAPI
# InternalMathModU64x32 (
# IN UINT64 Dividend,
# IN UINT32 Divisor
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathModU64x32):
movl 8(%esp), %eax
movl 12(%esp), %ecx
xorl %edx, %edx
divl %ecx
movl 4(%esp), %eax
divl %ecx
movl %edx, %eax
ret

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@@ -1,40 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# Monitor.S
#
# Abstract:
#
# AsmMonitor function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmMonitor)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# AsmMonitor (
# IN UINTN Eax,
# IN UINTN Ecx,
# IN UINTN Edx
# );
#------------------------------------------------------------------------------
ASM_PFX(AsmMonitor):
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl 12(%esp), %edx
monitor %eax, %ecx, %edx # monitor
ret

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@@ -1,41 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# MultU64x32.S
#
# Abstract:
#
# Calculate the product of a 64-bit integer and a 32-bit integer
#
#------------------------------------------------------------------------------
.code:
ASM_GLOBAL ASM_PFX(InternalMathMultU64x32)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathMultU64x32 (
# IN UINT64 Multiplicand,
# IN UINT32 Multiplier
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathMultU64x32):
movl 12(%esp), %ecx
movl %ecx, %eax
imull 8(%esp), %ecx # overflow not detectable
mull 0x4(%esp)
addl %ecx, %edx
ret

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@@ -1,44 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# MultU64x64.S
#
# Abstract:
#
# Calculate the product of a 64-bit integer and another 64-bit integer
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathMultU64x64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathMultU64x64 (
# IN UINT64 Multiplicand,
# IN UINT64 Multiplier
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathMultU64x64):
push %ebx
movl 8(%esp), %ebx # ebx <- M1[0..31]
movl 16(%esp), %edx # edx <- M2[0..31]
movl %ebx, %ecx
movl %edx, %eax
imull 20(%esp), %ebx # ebx <- M1[0..31] * M2[32..63]
imull 12(%esp), %edx # edx <- M1[32..63] * M2[0..31]
addl %edx, %ebx # carries are abandoned
mull %ecx # edx:eax <- M1[0..31] * M2[0..31]
addl %ebx, %edx # carries are abandoned
pop %ebx
ret

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@@ -1,38 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# Mwait.S
#
# Abstract:
#
# AsmMwait function
#
# Notes:
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(AsmMwait)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# AsmMwait (
# IN UINTN Eax,
# IN UINTN Ecx
# );
#------------------------------------------------------------------------------
ASM_PFX(AsmMwait):
movl 4(%esp), %eax
movl 8(%esp), %ecx
mwait
ret

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@@ -1,48 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# RRotU64.S
#
# Abstract:
#
# 64-bit right rotation for Ia32
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathRRotU64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathRRotU64 (
# IN UINT64 Operand,
# IN UINTN Count
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathRRotU64):
push %ebx
movb 16(%esp), %cl
movl 8(%esp), %eax
movl 12(%esp), %edx
shrdl %cl, %eax, %ebx
shrdl %cl, %edx, %eax
roll %cl, %ebx
shrdl %cl, %ebx, %edx
testb $32, %cl # Count >= 32?
jz L0
movl %eax, %ecx # switch eax & edx if Count >= 32
movl %edx, %eax
movl %ecx, %edx
L0:
pop %ebx
ret

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@@ -1,46 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# RShiftU64.S
#
# Abstract:
#
# 64-bit logical right shift function for IA-32
#
#------------------------------------------------------------------------------
.code:
ASM_GLOBAL ASM_PFX(InternalMathRShiftU64)
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathRShiftU64 (
# IN UINT64 Operand,
# IN UINTN Count
# );
#------------------------------------------------------------------------------
ASM_PFX(InternalMathRShiftU64):
movb 12(%esp), %cl # cl <- Count
xorl %edx, %edx
movl 8(%esp), %eax
testb $32, %cl # Count >= 32?
jnz L0
movl %eax, %edx
movl 0x4(%esp), %eax
L0:
shrdl %cl, %edx, %eax
shr %cl, %edx
ret

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@@ -1,80 +0,0 @@
#------------------------------------------------------------------------------ ;
# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# RdRand.S
#
# Abstract:
#
# Generates random number through CPU RdRand instruction under 32-bit platform.
#
# Notes:
#
#------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Generates a 16 bit random number through RDRAND instruction.
// Return TRUE if Rand generated successfully, or FALSE if not.
//
// BOOLEAN EFIAPI InternalX86RdRand16 (UINT16 *Rand);
//------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86RdRand16)
ASM_PFX(InternalX86RdRand16):
.byte 0x0f, 0xc7, 0xf0 // rdrand r16: "0f c7 /6 ModRM:r/m(w)"
jc rn16_ok // jmp if CF=1
xor %eax, %eax // reg=0 if CF=0
ret // return with failure status
rn16_ok:
mov 0x4(%esp), %edx
mov %ax, (%edx)
mov $0x1, %eax
ret
//------------------------------------------------------------------------------
// Generates a 32 bit random number through RDRAND instruction.
// Return TRUE if Rand generated successfully, or FALSE if not.
//
// BOOLEAN EFIAPI InternalX86RdRand32 (UINT32 *Rand);
//------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86RdRand32)
ASM_PFX(InternalX86RdRand32):
.byte 0x0f, 0xc7, 0xf0 // rdrand r32: "0f c7 /6 ModRM:r/m(w)"
jc rn32_ok // jmp if CF=1
xor %eax, %eax // reg=0 if CF=0
ret // return with failure status
rn32_ok:
mov 0x4(%esp), %edx
mov %eax, (%edx)
mov $0x1, %eax
ret
//------------------------------------------------------------------------------
// Generates a 64 bit random number through RDRAND instruction.
// Return TRUE if Rand generated successfully, or FALSE if not.
//
// BOOLEAN EFIAPI InternalX86RdRand64 (UINT64 *Rand);
//------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalX86RdRand64)
ASM_PFX(InternalX86RdRand64):
.byte 0x0f, 0xc7, 0xf0 // rdrand r32: "0f c7 /6 ModRM:r/m(w)"
jnc rn64_ret // jmp if CF=0
mov 0x4(%esp), %edx
mov %eax, (%edx)
.byte 0x0f, 0xc7, 0xf0 // generate another 32 bit RN
jnc rn64_ret // jmp if CF=0
mov %eax, 0x4(%edx)
mov $0x1, %eax
ret
rn64_ret:
xor %eax, %eax
ret // return with failure status

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@@ -1,44 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# SetJump.S
#
# Abstract:
#
# Implementation of SetJump() on IA-32.
#
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)
#------------------------------------------------------------------------------
# UINTN
# EFIAPI
# SetJump (
# OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
# );
#------------------------------------------------------------------------------
ASM_PFX(SetJump):
pushl 0x4(%esp)
call ASM_PFX(InternalAssertJumpBuffer) # To validate JumpBuffer
pop %ecx
pop %ecx # ecx <- return address
movl (%esp), %edx
movl %ebx, (%edx)
movl %esi, 4(%edx)
movl %edi, 8(%edx)
movl %ebp, 12(%edx)
movl %esp, 16(%edx)
movl %ecx, 20(%edx) # eip value to restore in LongJump
xorl %eax, %eax
jmp *%ecx

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@@ -1,38 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# CpuId.S
#
# Abstract:
#
# AsmCpuid function
#
# Notes:
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# UINT64
# EFIAPI
# InternalMathSwapBytes64 (
# IN UINT64 Operand
# );
#------------------------------------------------------------------------------
ASM_GLOBAL ASM_PFX(InternalMathSwapBytes64)
ASM_PFX(InternalMathSwapBytes64):
movl 8(%esp), %eax # eax <- upper 32 bits
movl 4(%esp), %edx # edx <- lower 32 bits
bswapl %eax
bswapl %edx
ret

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@@ -1,222 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# Thunk16.S
#
# Abstract:
#
# Real mode thunk
#
#------------------------------------------------------------------------------
#include <Library/BaseLib.h>
ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
.code16
ASM_PFX(m16Start):
SavedGdt: .space 6
ASM_PFX(BackFromUserCode):
push %ss
push %cs
calll L_Base1 # push eip
L_Base1:
pushfl
cli # disable interrupts
push %gs
push %fs
push %es
push %ds
pushal
.byte 0x66, 0xba # mov edx, imm32
ASM_PFX(ThunkAttr): .space 4
testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
jz 1f
movw $0x2401, %ax
int $0x15
cli # disable interrupts
jnc 2f
1:
testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
jz 2f
inb $0x92, %al
orb $2, %al
outb %al, $0x92 # deactivate A20M#
2:
xorl %eax, %eax
movw %ss, %ax
leal IA32_REGS_SIZE(%esp), %ebp
mov %ebp, (_ESP - IA32_REGS_SIZE)(%bp)
mov (_EIP - IA32_REGS_SIZE)(%bp), %bx
shll $4, %eax
addl %eax, %ebp
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4
movl %eax, %cr4
lgdtl %cs:(SavedGdt - L_Base1)(%bx)
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4
movl %eax, %cr0
.byte 0xb8 # mov ax, imm16
SavedSs: .space 2
movl %eax, %ss
.byte 0x66, 0xbc # mov esp, imm32
SavedEsp: .space 4
lretl # return to protected mode
_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
.word 0x8
_16Idtr: .word 0x3ff
.long 0
_16Gdtr: .word GdtEnd - _NullSegDesc - 1
_16GdtrBase: .long _NullSegDesc
ASM_PFX(ToUserCode):
movw %ss, %dx
movw %cx, %ss # set new segment selectors
movw %cx, %ds
movw %cx, %es
movw %cx, %fs
movw %cx, %gs
movl %eax, %cr0 # real mode starts at next instruction
# which (per SDM) *must* be a far JMP.
ljmpw $0,$0 # will be filled in by InternalAsmThunk16
L_Base: # to point here.
movl %ebp, %cr4
movw %si, %ss # set up 16-bit stack segment
xchgl %ebx, %esp # set up 16-bit stack pointer
movw IA32_REGS_SIZE(%esp), %bp # get BackToUserCode address from stack
mov %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)
mov %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)
lidtl %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)
popal
pop %ds
pop %es
pop %fs
pop %gs
popfl
lretl # transfer control to user code
_NullSegDesc: .quad 0
_16CsDesc:
.word -1
.word 0
.byte 0
.byte 0x9b
.byte 0x8f # 16-bit segment, 4GB limit
.byte 0
_16DsDesc:
.word -1
.word 0
.byte 0
.byte 0x93
.byte 0x8f # 16-bit segment, 4GB limit
.byte 0
GdtEnd:
.code32
#
# @param RegSet The pointer to a IA32_DWORD_REGS structure
# @param Transition The pointer to the transition code
# @return The address of the 16-bit stack after returning from user code
#
ASM_PFX(InternalAsmThunk16):
push %ebp
push %ebx
push %esi
push %edi
push %ds
push %es
push %fs
push %gs
movl 36(%esp), %esi # esi <- RegSet
movzwl _SS(%esi), %edx
mov _ESP(%esi), %edi
add $(-(IA32_REGS_SIZE + 4)), %edi
movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax
push $(IA32_REGS_SIZE / 4)
addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx
rep
movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment
lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
movl %eax, %ecx
andl $0xf, %ecx
shll $12, %eax
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
movw %cx, %ax
stosl # [edi] <- return address of user code
addl $(L_Base - ASM_PFX(BackFromUserCode)), %eax
movl %eax, (L_Base - SavedCr0 - 4)(%edx)
sgdtl (SavedGdt - SavedCr0)(%edx)
sidtl 0x24(%esp)
movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp
mov %ebp, (SavedCr4 - SavedCr0)(%edx)
andl $0xffffffcf, %ebp # clear PAE, PSE bits
pushl $0x10
pop %ecx # ecx <- selector for data segments
lgdtl (_16Gdtr - SavedCr0)(%edx)
pushfl
lcall *(_EntryPoint - SavedCr0)(%edx)
popfl
lidtl 0x24(%esp)
lea -IA32_REGS_SIZE(%ebp), %eax
pop %gs
pop %fs
pop %es
pop %ds
pop %edi
pop %esi
pop %ebx
pop %ebp
ret
.const:
ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)
ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)