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Update PCI bus driver to support non-standard PCI to PCI bridge I/O window alignment, such as 2K/1K/512 byte. Feature PCD PcdPciBridgeIoAlignmentProbe is introduced to turn on/off this feature.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9598 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
rsun3
2009-12-24 11:58:04 +00:00
parent 423401f9ea
commit 1ef2678316
7 changed files with 49 additions and 6 deletions
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30
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
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@@ -469,6 +469,36 @@ GatherPpbInfo (
}
}
//
// if PcdPciBridgeIoAlignmentProbe is TRUE, PCI bus driver probes
// PCI bridge supporting non-stardard I/O window alignment less than 4K.
//
PciIoDevice->BridgeIoAlignment = 0xFFF;
if (FeaturePcdGet (PcdPciBridgeIoAlignmentProbe)) {
//
// Check any bits of bit 3-1 of I/O Base Register are writable.
// if so, it is assumed non-stardard I/O window alignment is supported by this bridge.
// Per spec, bit 3-1 of I/O Base Register are reserved bits, so its content can't be assumed.
//
Value = Temp ^ (BIT3 | BIT2 | BIT1);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Value);
PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Value);
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x1C, 1, &Temp);
Value = (Value ^ Temp) & (BIT3 | BIT2 | BIT1);
switch (Value) {
case BIT3:
PciIoDevice->BridgeIoAlignment = 0x7FF;
break;
case BIT3 | BIT2:
PciIoDevice->BridgeIoAlignment = 0x3FF;
break;
case BIT3 | BIT2 | BIT1:
PciIoDevice->BridgeIoAlignment = 0x1FF;
break;
}
}
Status = BarExisted (
PciIoDevice,
0x24,