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clean up all of eight BaseMemoryLib instances in MdePkg with the following updates:

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1.	Remove .intel_syntax directives in GCC assembly files. All these assembly files have been updated to use the preferred syntax for GAS
2.	Correct the incorrect comments for internal worker functions for SetMemXX() and ScanMemXX(). The Length parameter is actually the counter of 16-bit, 32-bit or 64-bit value. 
3.	Simplify the logic in ZeroMemoryWrapper.c for BaseMemoryLibOptPei instance to remove the conditional statement for zero length. This logic is already covered by worker function InternalMemZeroMem(). 
4.	Cleanup all the Wrapper C files in BaseMemoryLib instances. They are supposed to be shared by all these 8 BaseMemoryLib instances, but are out-of-sync after some maintenance. This patch re-syncs them and makes them exactly the same.
5.	Cleanup MemLibInternal.h so that it is shared by 6 BaseMemoryLib instance except for PeiMemoryLib and UefiMemoryLib.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9041 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8
2009-08-11 15:32:16 +00:00
parent ba19956ac3
commit 1fef058f4b
162 changed files with 1087 additions and 1252 deletions
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61
MdePkg/Library/BaseMemoryLibOptDxe/X64/CopyMem.S
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@@ -3,7 +3,7 @@
#
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation
# Copyright (c) 2006 - 2009, Intel Corporation
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -33,51 +33,50 @@
# IN UINTN Count
# )
#------------------------------------------------------------------------------
.intel_syntax noprefix
ASM_GLOBAL ASM_PFX(InternalMemCopyMem)
ASM_PFX(InternalMemCopyMem):
push rsi
push rdi
mov rsi, rdx # rsi <- Source
mov rdi, rcx # rdi <- Destination
lea r9, [rsi + r8 - 1] # r9 <- Last byte of Source
cmp rsi, rdi
mov rax, rdi # rax <- Destination as return value
pushq %rsi
pushq %rdi
movq %rdx, %rsi # rsi <- Source
movq %rcx, %rdi # rdi <- Destination
leaq -1(%rsi,%r8,), %r9 # r9 <- Last byte of Source
cmpq %rdi, %rsi
movq %rdi, %rax # rax <- Destination as return value
jae L0 # Copy forward if Source > Destination
cmp r9, rdi # Overlapped?
jae L_CopyBackward # Copy backward if overlapped
cmpq %rdi, %r9 # Overlapped?
jae L_CopyBackward # Copy backward if overlapped
L0:
xor rcx, rcx
sub rcx, rdi # rcx <- -rdi
and rcx, 15 # rcx + rsi should be 16 bytes aligned
xorq %rcx, %rcx
subq %rdi, %rcx # rcx <- -rdi
andq $15, %rcx # rcx + rsi should be 16 bytes aligned
jz L1 # skip if rcx == 0
cmp rcx, r8
cmova rcx, r8
sub r8, rcx
cmpq %r8, %rcx
cmova %r8, %rcx
subq %rcx, %r8
rep movsb
L1:
mov rcx, r8
and r8, 15
shr rcx, 4 # rcx <- # of DQwords to copy
movq %r8, %rcx
andq $15, %r8
shrq $4, %rcx # rcx <- # of DQwords to copy
jz L_CopyBytes
movdqa [rsp + 0x18], xmm0 # save xmm0 on stack
movdqu %xmm0, 0x18(%rsp) # save xmm0 on stack
L2:
movdqu xmm0, [rsi] # rsi may not be 16-byte aligned
movntdq [rdi], xmm0 # rdi should be 16-byte aligned
add rsi, 16
add rdi, 16
movdqu (%rsi), %xmm0 # rsi may not be 16-byte aligned
movntdq %xmm0, (%rdi) # rdi should be 16-byte aligned
addq $16, %rsi
addq $16, %rdi
loop L2
mfence
movdqa xmm0, [rsp + 0x18] # restore xmm0
movdqa 0x18(%rsp), %xmm0 # restore xmm0
jmp L_CopyBytes # copy remaining bytes
L_CopyBackward:
mov rsi, r9 # rsi <- Last byte of Source
lea rdi, [rdi + r8 - 1] # rdi <- Last byte of Destination
movq %r9, %rsi # rsi <- Last byte of Source
leaq -1(%rdi, %r8,), %rdi # rdi <- Last byte of Destination
std
L_CopyBytes:
mov rcx, r8
movq %r8, %rcx
rep movsb
cld
pop rdi
pop rsi
popq %rdi
popq %rsi
ret