clean up all of eight BaseMemoryLib instances in MdePkg with the following updates:
1. Remove .intel_syntax directives in GCC assembly files. All these assembly files have been updated to use the preferred syntax for GAS 2. Correct the incorrect comments for internal worker functions for SetMemXX() and ScanMemXX(). The Length parameter is actually the counter of 16-bit, 32-bit or 64-bit value. 3. Simplify the logic in ZeroMemoryWrapper.c for BaseMemoryLibOptPei instance to remove the conditional statement for zero length. This logic is already covered by worker function InternalMemZeroMem(). 4. Cleanup all the Wrapper C files in BaseMemoryLib instances. They are supposed to be shared by all these 8 BaseMemoryLib instances, but are out-of-sync after some maintenance. This patch re-syncs them and makes them exactly the same. 5. Cleanup MemLibInternal.h so that it is shared by 6 BaseMemoryLib instance except for PeiMemoryLib and UefiMemoryLib. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9041 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -3,7 +3,7 @@
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#
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# Copyright (c) 2006 - 2009, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@@ -34,40 +34,39 @@
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# IN UINT8 Value
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# )
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#------------------------------------------------------------------------------
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.intel_syntax noprefix
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ASM_GLOBAL ASM_PFX(InternalMemSetMem)
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ASM_PFX(InternalMemSetMem):
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push rdi
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mov rdi, rcx # rdi <- Buffer
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mov al, r8b # al <- Value
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mov r9, rdi # r9 <- Buffer as return value
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xor rcx, rcx
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sub rcx, rdi
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and rcx, 15 # rcx + rdi aligns on 16-byte boundary
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pushq %rdi
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movq %rcx, %rdi # rdi <- Buffer
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movb %r8b, %al # al <- Value
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movq %rdi, %r9 # r9 <- Buffer as return value
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xorq %rcx, %rcx
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subq %rdi, %rcx
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andq $15, %rcx # rcx + rdi aligns on 16-byte boundary
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jz L0
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cmp rcx, rdx
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cmova rcx, rdx
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sub rdx, rcx
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cmpq %rdx, %rcx
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cmova %rdx, %rcx
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subq %rcx, %rdx
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rep stosb
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L0:
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mov rcx, rdx
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and rdx, 15
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shr rcx, 4
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movq %rdx, %rcx
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andq $15, %rdx
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shrq $4, %rcx
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jz L_SetBytes
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mov ah, al # ax <- Value repeats twice
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movdqa [rsp + 0x10], xmm0 # save xmm0
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movd xmm0, eax # xmm0[0..16] <- Value repeats twice
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pshuflw xmm0, xmm0, 0 # xmm0[0..63] <- Value repeats 8 times
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movlhps xmm0, xmm0 # xmm0 <- Value repeats 16 times
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movb %al, %ah # ax <- Value repeats twice
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movdqa %xmm0, 0x10(%rsp) # save xmm0
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movd %eax, %xmm0 # xmm0[0..16] <- Value repeats twice
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pshuflw $0, %xmm0, %xmm0 # xmm0[0..63] <- Value repeats 8 times
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movlhps %xmm0, %xmm0 # xmm0 <- Value repeats 16 times
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L1:
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movntdq [rdi], xmm0 # rdi should be 16-byte aligned
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add rdi, 16
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movntdq %xmm0, (%rdi) # rdi should be 16-byte aligned
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add $16, %rdi
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loop L1
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mfence
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movdqa xmm0, [rsp + 0x10] # restore xmm0
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movdqa 0x10(%rsp), %xmm0 # restore xmm0
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L_SetBytes:
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mov ecx, edx # high 32 bits of rcx are always zero
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movl %edx, %ecx # high 32 bits of rcx are always zero
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rep stosb
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mov rax, r9 # rax <- Return value
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pop rdi
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movq %r9, %rax # rax <- Return value
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popq %rdi
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ret
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