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clean up all of eight BaseMemoryLib instances in MdePkg with the following updates:

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1.	Remove .intel_syntax directives in GCC assembly files. All these assembly files have been updated to use the preferred syntax for GAS
2.	Correct the incorrect comments for internal worker functions for SetMemXX() and ScanMemXX(). The Length parameter is actually the counter of 16-bit, 32-bit or 64-bit value. 
3.	Simplify the logic in ZeroMemoryWrapper.c for BaseMemoryLibOptPei instance to remove the conditional statement for zero length. This logic is already covered by worker function InternalMemZeroMem(). 
4.	Cleanup all the Wrapper C files in BaseMemoryLib instances. They are supposed to be shared by all these 8 BaseMemoryLib instances, but are out-of-sync after some maintenance. This patch re-syncs them and makes them exactly the same.
5.	Cleanup MemLibInternal.h so that it is shared by 6 BaseMemoryLib instance except for PeiMemoryLib and UefiMemoryLib.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9041 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8
2009-08-11 15:32:16 +00:00
parent ba19956ac3
commit 1fef058f4b
162 changed files with 1087 additions and 1252 deletions
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51
MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.S
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@@ -3,7 +3,7 @@
#
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation
# Copyright (c) 2006 - 2009, Intel Corporation
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -34,40 +34,39 @@
# IN UINT8 Value
# )
#------------------------------------------------------------------------------
.intel_syntax noprefix
ASM_GLOBAL ASM_PFX(InternalMemSetMem)
ASM_PFX(InternalMemSetMem):
push rdi
mov rdi, rcx # rdi <- Buffer
mov al, r8b # al <- Value
mov r9, rdi # r9 <- Buffer as return value
xor rcx, rcx
sub rcx, rdi
and rcx, 15 # rcx + rdi aligns on 16-byte boundary
pushq %rdi
movq %rcx, %rdi # rdi <- Buffer
movb %r8b, %al # al <- Value
movq %rdi, %r9 # r9 <- Buffer as return value
xorq %rcx, %rcx
subq %rdi, %rcx
andq $15, %rcx # rcx + rdi aligns on 16-byte boundary
jz L0
cmp rcx, rdx
cmova rcx, rdx
sub rdx, rcx
cmpq %rdx, %rcx
cmova %rdx, %rcx
subq %rcx, %rdx
rep stosb
L0:
mov rcx, rdx
and rdx, 15
shr rcx, 4
movq %rdx, %rcx
andq $15, %rdx
shrq $4, %rcx
jz L_SetBytes
mov ah, al # ax <- Value repeats twice
movdqa [rsp + 0x10], xmm0 # save xmm0
movd xmm0, eax # xmm0[0..16] <- Value repeats twice
pshuflw xmm0, xmm0, 0 # xmm0[0..63] <- Value repeats 8 times
movlhps xmm0, xmm0 # xmm0 <- Value repeats 16 times
movb %al, %ah # ax <- Value repeats twice
movdqa %xmm0, 0x10(%rsp) # save xmm0
movd %eax, %xmm0 # xmm0[0..16] <- Value repeats twice
pshuflw $0, %xmm0, %xmm0 # xmm0[0..63] <- Value repeats 8 times
movlhps %xmm0, %xmm0 # xmm0 <- Value repeats 16 times
L1:
movntdq [rdi], xmm0 # rdi should be 16-byte aligned
add rdi, 16
movntdq %xmm0, (%rdi) # rdi should be 16-byte aligned
add $16, %rdi
loop L1
mfence
movdqa xmm0, [rsp + 0x10] # restore xmm0
movdqa 0x10(%rsp), %xmm0 # restore xmm0
L_SetBytes:
mov ecx, edx # high 32 bits of rcx are always zero
movl %edx, %ecx # high 32 bits of rcx are always zero
rep stosb
mov rax, r9 # rax <- Return value
pop rdi
movq %r9, %rax # rax <- Return value
popq %rdi
ret