clean up all of eight BaseMemoryLib instances in MdePkg with the following updates:

1.	Remove .intel_syntax directives in GCC assembly files. All these assembly files have been updated to use the preferred syntax for GAS
2.	Correct the incorrect comments for internal worker functions for SetMemXX() and ScanMemXX(). The Length parameter is actually the counter of 16-bit, 32-bit or 64-bit value. 
3.	Simplify the logic in ZeroMemoryWrapper.c for BaseMemoryLibOptPei instance to remove the conditional statement for zero length. This logic is already covered by worker function InternalMemZeroMem(). 
4.	Cleanup all the Wrapper C files in BaseMemoryLib instances. They are supposed to be shared by all these 8 BaseMemoryLib instances, but are out-of-sync after some maintenance. This patch re-syncs them and makes them exactly the same.
5.	Cleanup MemLibInternal.h so that it is shared by 6 BaseMemoryLib instance except for PeiMemoryLib and UefiMemoryLib.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9041 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.S

@@ -3,7 +3,7 @@
 #
 #------------------------------------------------------------------------------
 #
-# Copyright (c) 2006 - 2008, Intel Corporation
+# Copyright (c) 2006 - 2009, Intel Corporation
 # All rights reserved. This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
 # which accompanies this distribution.  The full text of the license may be found at
@@ -32,35 +32,34 @@
 #    IN UINTN  Count
 #    );
 #------------------------------------------------------------------------------
-.intel_syntax noprefix
 ASM_GLOBAL ASM_PFX(InternalMemZeroMem)
 ASM_PFX(InternalMemZeroMem):
-    push    rdi
-    mov     rdi, rcx
-    xor     rcx, rcx
-    xor     eax, eax
-    sub     rcx, rdi
-    and     rcx, 15
-    mov     r8, rdi
+    pushq   %rdi
+    movq    %rcx, %rdi
+    xorq    %rcx, %rcx
+    xorl    %eax, %eax
+    subq    %rdi, %rcx
+    andq    $15, %rcx
+    movq    %rdi, %r8
     jz      L0
-    cmp     rcx, rdx
-    cmova   rcx, rdx
-    sub     rdx, rcx
+    cmpq    %rdx, %rcx
+    cmova   %rdx, %rcx
+    subq    %rcx, %rdx
     rep     stosb
 L0:
-    mov     rcx, rdx
-    and     edx, 15
-    shr     rcx, 4
+    movq    %rdx, %rcx
+    andl    $15, %edx
+    shrq    $4, %rcx
     jz      L_ZeroBytes
-    pxor    xmm0, xmm0
+    pxor    %xmm0, %xmm0
 L1:
-    movntdq [rdi], xmm0                 # rdi should be 16-byte aligned
-    add     rdi, 16
+    movntdq %xmm0, (%rdi)                 # rdi should be 16-byte aligned
+    addq    $16, %rdi
     loop    L1
     mfence
 L_ZeroBytes:
-    mov     ecx, edx
+    movl    %edx, %ecx
     rep     stosb
-    mov     rax, r8
-    pop     rdi
+    movq    %r8, %rax
+    popq    %rdi
     ret