sravan/system76-edk2
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Correct TSS segment.

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TSS segment should use (SIZE - 1) as limit, and do not set G bit (highest bit of LimitHigh) because limit means byte count.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Fan, Jeff" <jeff.fan@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18935 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Yao, Jiewen
2015-11-25 04:01:00 +00:00
committed by jyao1
parent c7981a1184
commit 20ab326972
4 changed files with 12 additions and 12 deletions
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8
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
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@ -82,18 +82,18 @@ CodeSeg64:
.equ GDT_SIZE, .- NullSeg .equ GDT_SIZE, .- NullSeg
TssSeg: TssSeg:
.word TSS_DESC_SIZE # LimitLow .word TSS_DESC_SIZE -1 # LimitLow
.word 0 # BaseLow .word 0 # BaseLow
.byte 0 # BaseMid .byte 0 # BaseMid
.byte 0x89 .byte 0x89
.byte 0x80 # LimitHigh .byte 0x00 # LimitHigh
.byte 0 # BaseHigh .byte 0 # BaseHigh
ExceptionTssSeg: ExceptionTssSeg:
.word TSS_DESC_SIZE # LimitLow .word TSS_DESC_SIZE - 1 # LimitLow
.word 0 # BaseLow .word 0 # BaseLow
.byte 0 # BaseMid .byte 0 # BaseMid
.byte 0x89 .byte 0x89
.byte 0x80 # LimitHigh .byte 0x00 # LimitHigh
.byte 0 # BaseHigh .byte 0 # BaseHigh
.equ CODE_SEL, CodeSeg32 - NullSeg .equ CODE_SEL, CodeSeg32 - NullSeg

8
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
View File

@ -85,18 +85,18 @@ CodeSeg64 LABEL QWORD
GDT_SIZE = $ - offset NullSeg GDT_SIZE = $ - offset NullSeg
TssSeg LABEL QWORD TssSeg LABEL QWORD
DW TSS_DESC_SIZE ; LimitLow DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow DW 0 ; BaseLow
DB 0 ; BaseMid DB 0 ; BaseMid
DB 89h DB 89h
DB 080h ; LimitHigh DB 00h ; LimitHigh
DB 0 ; BaseHigh DB 0 ; BaseHigh
ExceptionTssSeg LABEL QWORD ExceptionTssSeg LABEL QWORD
DW TSS_DESC_SIZE ; LimitLow DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow DW 0 ; BaseLow
DB 0 ; BaseMid DB 0 ; BaseMid
DB 89h DB 89h
DB 080h ; LimitHigh DB 00h ; LimitHigh
DB 0 ; BaseHigh DB 0 ; BaseHigh
CODE_SEL = offset CodeSeg32 - offset NullSeg CODE_SEL = offset CodeSeg32 - offset NullSeg

4
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
View File

@ -79,11 +79,11 @@ CodeSeg64:
.byte 0 # BaseHigh .byte 0 # BaseHigh
# TSS Segment for X64 specially # TSS Segment for X64 specially
TssSeg: TssSeg:
.word TSS_DESC_SIZE # LimitLow .word TSS_DESC_SIZE - 1 # LimitLow
.word 0 # BaseLow .word 0 # BaseLow
.byte 0 # BaseMid .byte 0 # BaseMid
.byte 0x89 .byte 0x89
.byte 0xDB # LimitHigh .byte 0x00 # LimitHigh
.byte 0 # BaseHigh .byte 0 # BaseHigh
.long 0 # BaseUpper .long 0 # BaseUpper
.long 0 # Reserved .long 0 # Reserved

4
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
View File

@ -78,11 +78,11 @@ CodeSeg64 LABEL QWORD
DB 0 ; BaseHigh DB 0 ; BaseHigh
; TSS Segment for X64 specially ; TSS Segment for X64 specially
TssSeg LABEL QWORD TssSeg LABEL QWORD
DW TSS_DESC_SIZE ; LimitLow DW TSS_DESC_SIZE - 1 ; LimitLow
DW 0 ; BaseLow DW 0 ; BaseLow
DB 0 ; BaseMid DB 0 ; BaseMid
DB 89h DB 89h
DB 080h ; LimitHigh DB 00h ; LimitHigh
DB 0 ; BaseHigh DB 0 ; BaseHigh
DD 0 ; BaseUpper DD 0 ; BaseUpper
DD 0 ; Reserved DD 0 ; Reserved