Add a simple PCI host bridge driver.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8396 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten
251
PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
Executable file
251
PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.h
Executable file
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/** @file
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The Header file of the Pci Host Bridge Driver
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Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights
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reserved. This program and the accompanying materials are
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PCI_HOST_BRIDGE_H_
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#define _PCI_HOST_BRIDGE_H_
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#include <PiDxe.h>
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#include <IndustryStandard/Pci.h>
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#include <IndustryStandard/Acpi.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Protocol/CpuIo.h>
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#include <Protocol/Metronome.h>
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#include <Protocol/DevicePath.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/DevicePathLib.h>
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//
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// Hard code the host bridge number in the platform.
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// In this chipset, there is only one host bridge.
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//
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#define HOST_BRIDGE_NUMBER 1
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#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32('e', 'h', 's', 't')
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typedef struct {
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UINTN Signature;
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EFI_HANDLE HostBridgeHandle;
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UINTN RootBridgeNumber;
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LIST_ENTRY Head;
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BOOLEAN ResourceSubmited;
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BOOLEAN CanRestarted;
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
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} PCI_HOST_BRIDGE_INSTANCE;
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#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
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CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
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//
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// Driver Entry Point
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//
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EFI_STATUS
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EFIAPI
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EfiMain (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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//
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// HostBridge Resource Allocation interface
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//
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EFI_STATUS
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EFIAPI
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NotifyPhase(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
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);
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EFI_STATUS
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EFIAPI
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GetNextRootBridge(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN OUT EFI_HANDLE *RootBridgeHandle
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);
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EFI_STATUS
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EFIAPI
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GetAttributes(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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OUT UINT64 *Attributes
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);
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EFI_STATUS
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EFIAPI
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StartBusEnumeration(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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OUT VOID **Configuration
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);
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EFI_STATUS
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EFIAPI
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SetBusNumbers(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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IN VOID *Configuration
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);
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EFI_STATUS
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EFIAPI
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SubmitResources(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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IN VOID *Configuration
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);
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EFI_STATUS
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EFIAPI
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GetProposedResources(
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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OUT VOID **Configuration
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);
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EFI_STATUS
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EFIAPI
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PreprocessController (
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
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IN EFI_HANDLE RootBridgeHandle,
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
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IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
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);
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//
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// Define resource status constant
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//
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#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
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#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
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//
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// Driver Instance Data Prototypes
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//
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typedef struct {
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;
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UINTN NumberOfBytes;
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UINTN NumberOfPages;
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EFI_PHYSICAL_ADDRESS HostAddress;
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EFI_PHYSICAL_ADDRESS MappedHostAddress;
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} MAP_INFO;
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typedef struct {
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ACPI_HID_DEVICE_PATH AcpiDevicePath;
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EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
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} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
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typedef struct {
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UINT64 BusBase;
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UINT64 BusLimit;
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UINT64 MemBase;
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UINT64 MemLimit;
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UINT64 IoBase;
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UINT64 IoLimit;
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} PCI_ROOT_BRIDGE_RESOURCE_APPETURE;
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typedef enum {
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TypeIo = 0,
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TypeMem32,
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TypePMem32,
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TypeMem64,
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TypePMem64,
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TypeBus,
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TypeMax
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} PCI_RESOURCE_TYPE;
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typedef enum {
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ResNone = 0,
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ResSubmitted,
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ResRequested,
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ResAllocated,
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ResStatusMax
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} RES_STATUS;
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typedef struct {
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PCI_RESOURCE_TYPE Type;
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UINT64 Base;
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UINT64 Length;
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UINT64 Alignment;
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RES_STATUS Status;
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} PCI_RES_NODE;
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#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32('e', '2', 'p', 'b')
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typedef struct {
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UINT32 Signature;
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LIST_ENTRY Link;
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EFI_HANDLE Handle;
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UINT64 RootBridgeAttrib;
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UINT64 Attributes;
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UINT64 Supports;
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//
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// Specific for this memory controller: Bus, I/O, Mem
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//
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PCI_RES_NODE ResAllocNode[6];
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//
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// Addressing for Memory and I/O and Bus arrange
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//
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UINT64 BusBase;
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UINT64 MemBase;
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UINT64 IoBase;
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UINT64 BusLimit;
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UINT64 MemLimit;
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UINT64 IoLimit;
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EFI_LOCK PciLock;
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UINTN PciAddress;
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UINTN PciData;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
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} PCI_ROOT_BRIDGE_INSTANCE;
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//
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// Driver Instance Data Macros
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//
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#define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
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CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
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#define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
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CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
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EFI_STATUS
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RootBridgeConstructor (
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Protocol,
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IN EFI_HANDLE HostBridgeHandle,
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IN UINT64 Attri,
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IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE *ResAppeture
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);
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#endif
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